Business and Markets

Last month, leading-edge equipment company ASML announced a surprising €1.3 billion investment into French AI company Mistral. The two companies touted stronger collaboration and the desire to “innovate faster together.” Even though some observers were skeptical, the commitment of one European tech champion into an aspiring European tech firm in the world’s hottest industry made plenty of sense. Writing for Bloomberg, columnist Lionel Laurent noted that such a deal was “a win for Europe’s tech ambitions” and that Mistral would have increased credibility in an AI race dominated by the United States and China.Europe’s tech prowess indeed lags behind its global rivals. ASML is, perhaps surprisingly (or not, depending on your vantage point), Europe’s largest tech giant by market cap at $406 billion. Europe boasts no tech goliaths the size of Amazon or NVIDIA and is often left following the lead of American tech firms as they chart the commercialization of new technologies. In the semiconductor industry, Europe’s chip manufacturers comprise only 9% of global market share today compared to 44% in 1990. Despite the bleak reality that Europe’s tech ecosystem finds itself in, there are reasons to believe that the nadir of recent years is slowly giving way to a more robust and respected innovation landscape. This piece will focus specifically on semiconductor manufacturing, demonstrating how Europe is taking its technological future seriously, and how, despite the challenges that remain, ultimately Europe is poised to succeed.Three Shocks – How We Arrived At This MomentThough Europe may not have been satisfied with the technological balance of power of recent decades, such an arrangement was largely tenable in a globalized world which prioritized free markets and international security in the aftermath of the Cold War. Though numerous cracks appeared in previous decades, the last five years in particular have given way to three shocks which have awoken European policymakers.The first, of course, was the COVID pandemic and the decimation of supply chains that caused a rapid seesaw in chip inventories – from extreme shortage to extreme oversupply – that companies in the automotive and industrial sector are just now recovering from. One senior German official was quoted as saying, “We lost 1-1.5% of our GDP in 2021 because of a lack of semiconductors – or about €40 billion.”Only two years later would come Russia’s unthinkable invasion of Ukraine, an unwelcome new reality which has forced Europe to reckon with its defense posture and supply chain. Semiconductors, again, play a key role here – Europe is reliant on China’s legacy chip production, meaning that low-tech chips often find their way into strategic weaponry.Lastly, a second Trump administration has surprised and rallied European governments to respond to “America first” rhetoric. Combined with the aforementioned shocks, recent events have convinced even Europe’s most ardent globalists that the continent must now invest where necessary in order to protect its borders and foster a competitive and sovereign technology ecosystem.The Underwhelming Response So FarFast forward to today where Europe’s COVID supply chain disruptions quickly gave way to ambitious policy in the form of the €43 billion European Chips Act intended to stimulate private investment to complement public capital and push Europe’s chip manufacturing market share to 20%. In the more than two years since the legislation’s passing, however, announced projects have underwhelmed. Big splashes from Intel and Wolfspeed have failed to materialize due to overambitious market expectations. Today, you can almost count the key recipients on one hand – STMicroelectronics, Infineon, TSMC, GlobalFoundries, Silicon Box, and amsOSRAM.Despite the sense of cynicism from some corners, however, understanding the slow progress to this point helps to unlock the right strategies moving forward. Already, many industry stakeholders and policymakers have questioned if attracting manufacturing full stop is the right strategy. Peter Wennink, former CEO of ASML, called the European Commission’s target to secure 20% of the global chip market by 2030 “totally unrealistic,” emphasizing that Europe’s current share is “8% at best.”Even if Wennink’s conclusion is too harsh, the tangible lack of investment over the past couple of years paired with the urgent need for Europe to maintain and grow its semiconductor prowess in response to concerns of security and sovereignty still demands a workable solution. The answer lies in building upon Europe’s very real strengths in the chip industry, narrowing the scope of investment to key strategic areas and in continuing to prioritize collaboration at all costs. How Europe Can Still Meet The MomentAny conversation about Europe’s contributions to the global semiconductor industry should begin with its unparalleled research ecosystem, and there’s no better place to start than with Belgium’s imec, one of the foremost research institutions chip companies depend on. Earlier this year, imec’s President and CEO Luc Van den hove emphatically reminded his audience that “you can’t make an advanced chip without European technology.” Van den hove’s point was that Europe should be leaning into its strengths as a research powerhouse rather than trying to chase leading-edge nodes. The FAMES Pilot Line is one example of what that research prowess looks like in practice. Funded with €830 million via the EU Chips Act, the initiative brings together Europe’s leading research institutions (imec, Fraunhofer, CEA-Leti, and Tyndall) to develop open access to several key microelectronic technologies, with a strong emphasis on low-power applications for markets such as automotive, IoT, and mobile devices. Central to FAMES is its “open access” policy which enables European manufacturers to use its pilot line to develop prototypes and evaluate next-generation technologies. Chip companies without any manufacturing presence in Europe stand on the outside looking in, risking technological inferiority.While Europe flexes its academic prowess, however, it is increasingly recognizing its vulnerability when it comes to more mature-node technologies and production. Investments such as ESMC – TSMC’s joint-venture with regional champions Bosch, Infineon, and NXP – are a good start, but Europe fundamentally needs more mature tech, particularly for defense. In a recent piece for Foreign Affairs Magazine, authors Chris Miller and John Allen argued that Europe indeed has a promising semiconductor opportunity ahead of it, but only if it enhances cooperation with the United States. The fact that the two regions have similar goals and geopolitical rivals is an opportunity for Europe to attract greater chip investment from U.S. firms looking for Europe’s leading research capabilities and defense customers. The authors implore European policymakers to:“ensure that their chip companies can capitalize on the surge in defense spending by investing more in new defense technologies and fostering connections between large chip firms and small defense start-ups. European chip companies that have previously focused on civilian markets must realize that the defense industry, and particularly the drone sector, will drive growth and technological change.”Targeting these investments intelligently remains to be seen, but there can be no doubt that Europe is taking the funding challenge seriously. Germany, France, Italy, and the United Kingdom have all raised their defense spending as a percentage of national income, with Germany announcing plans to double its defense spending to €650 billion over the next five years.Securing Position In Europe's Semiconductor RenaissanceEurope’s semiconductor future will not be built by mimicking Taiwan’s fabrication prowess or outspending America’s subsidies. Instead, success lies in doubling down on what Europe already does exceptionally well – world-class research infrastructure, strategic positioning in mature and specialty nodes, and an increasingly robust defense industrial base hungry for secure semiconductor supply. As European chip subsidies continue and defense budgets surge across the continent and geopolitical fractures deepen, the strategic calculus is clear – semiconductor companies without meaningful European capacity risk ceding ground to competitors who recognized the shift early. The question is no longer whether Europe matters in the global chip ecosystem, but rather which companies will position themselves to capitalize on its inevitable growth.About Stephen M. RothrockStephen Rothrock founded ATREG in 2000 to help the world’s advanced technology companies divest and acquire infrastructure-rich manufacturing assets, including wafer fabs (front- and back-end) as well as MEMS, solar, display, and R D facilities. Over the last 25 years, his firm has completed 40% of all global operational wafer fab sales in the semiconductor industry, a total of 60 transactions. Recent global acquisitions and dispositions have involved Allegro MicroSystems, Bosch, Elmos, Fujitsu, GlobalFoundries, IBM, Infineon, Japan Display (JDI), Micron, NXP, onsemi, Qualcomm, Renesas, Sony, Texas Instruments, and VIS to name just a few. Prior to founding ATREG, Rothrock established Colliers International’s Global Corporate Services initiative and headed the company’s U.S. division based in Seattle, WashBefore that, he worked as Director for Savills International real estate brokerage in London UK, establishing their global corporate services platform serving large multinationals, many of whom were leading technology companies. Rothrock also served on the UK-listed property company’s international board. He spent four years near Paris, France working for an international NGO. Rothrock holds an MA degree from the University of Hull, UK and a BA degree in Business Commerce from the University of Washington in Seattle, USA.

Maheen Hamid is a co-founder of Breker Verification Systems, supplier of functional verification solutions for complex chip design challenges, and serves as its COO and CFO. She is also Co-Chair of the ESD Alliance and member of the SEMI North America Advisory Board (NAAB).Given her background, roles within the industry and interests, it seemed like a good time for me to reach out for her perspective and market analysis. During our discussion, she offered up some great observations, identified trends, pointed to areas in need of attention and ways for the industry to better collaborate. We ended by talking about AI’s role today.Smith: How do you track where the semiconductor industry is going?Hamid: Business and macro strategies have always been interesting to me. In recent years, with the increasing global importance of silicon sovereignty, it is necessary to track the pulse of initiatives across various channels in multiple geographies. Starting with policy discussions at SEMI to media coverage of the semiconductor value chain to EDA specific news, I read voraciously and listen in on disparate discussions. There is no denying that it is impossible to envision the boundaries of where the semiconductor industry could go, particularly in design innovation. Smith: Nonetheless, what trends have you identified?Hamid: Global trade wars are creating as many roadblocks as they are creating opportunities. It is fascinating to watch the incredible innovation led by the U.S. for decades in semiconductor design be challenged as technology and access to technology gets democratized across the board. Maintaining thought leadership is a demanding task and no longer contained to an individual company’s cleverness. Crafting an effort that is coordinated with national interests has become compulsory. Separately, developments in AI are creating a new wave of complex chip designs that are redefining hardware investments. Data centers are becoming as ubiquitous as the personal computers of the ‘80s. While advanced chip designs forge ahead and additional classes of chips such as memory become truly commoditized, the need for efficiency in the full flow from design to manufacturing becomes imperative to protect margins for relevant players.Smith: The need for industry collaboration appears to be a trend that is an essential part of the industry’s evolution. How do you see that developing in chip verification?Hamid: RISC-V has given rise to many new design starts by companies that do not have the legacy verification frameworks owned by the NVIDIAs and Intels of the world. Several of these larger customer companies are investing heavily in their own complex chip designs, creating interesting opportunities for a collaborative approach to enabling internal innovations. As well, this new class of customers is less married to enterprise flows from large EDA companies and prefer to invest in best-of-breed solutions. This is driving necessary collaborations across EDA vendors in chip verification. Driven by mutual customer demand, we have recently modified several of our arrangements with other EDA players.Interestingly, the momentum in the RISC-V ecosystem is also driving new initiatives in the more traditional flows. This is a necessary shake-up in how business needs to be done in an increasingly, globally competitive landscape. Smith: What area do you see that needs more attention?Hamid: It is imperative to keep the business climate conducive for innovation and thought leadership. Policy debates impacting the chip industry are getting more heated and controversial. We need more concerted collaboration among the players in the chip ecosystem to help influence this policy in a way that allows U.S. companies to thrive. We need to promote more opportunities that bring disparate companies together to build clever flows that increase our silicon sovereignty. Smith: AI is playing in the design and design tools area. What about other parts of an organization, such as finance or operations and marketing?Hamid: AI efficiencies can help with predictive analysis for large companies in these core functions such as finance, operations and marketing, but for smaller, nimble companies, the human element still rules. Our strategic marketing, as an example, is defining industry-leading initiatives. AI does not have access to language models to automate any of what we need to invent in communicating new ideas. LLMs do provide a good sounding board though. It’s interesting to “discuss” ideas with ChatGPT and pull templates of successful implementations in unrelated industries that could be a blueprint for how we approach next steps.About Maheen HamidMaheen Hamid is the co-founder CFO and COO at Breker Verification Systems, bringing a wealth of financial engineering experience from investment banking and small business management. Hamid has been instrumental in establishing Breker as an important stakeholder in the EDA industry, running its business side and driving operational growth as it thrives as an established software supplier. She plays an active role in defining the company’s strategic direction, corporate communications and branding. Hamid holds a BBA from North South University and an MBA from the University of Texas at Austin.Robert (Bob) Smith is executive director of the ESD Alliance, a SEMI Technology Community. 

The New Reality of Semiconductor Supply ChainsThe semiconductor industry is one of the most globally connected and time-sensitive sectors in existence. From design and wafer fabrication to testing, assembly, and delivery, every step depends on flawless coordination across borders, suppliers, and time zones. More than 1 trillion chips move through global supply chains each year[1], connecting suppliers, foundries, and fabs across continents.But as the world becomes more complex and unpredictable – with trade tensions, capacity shortages, shifting technology cycles, and driven by increasing AI and energy demand – that coordination is increasingly under pressure. Even a minor delay in one place can halt production in another. A single missed component, delayed shipment, or grounded flight can trigger line-down costs that can exceed $4 million per hour in advanced fabs[2].That’s why logistics is no longer a background process; it’s a strategic function that directly influences performance, reputation, and profitability.Figure 1 - We live in a complex and unpredictable world where global events have significant impacts. When Every Hour MattersFew industries feel the impact of delays as directly as semiconductors. One missing component, a grounded flight, or a customs delay can trigger a chain reaction that stops production lines, delays product launches or breaks contractual commitments.Time-critical logistics plays a distinct role in safeguarding supply chain performance, staying in control and enabling companies to recover in hours instead of days. It serves as the system’s shock absorbers when conventional routes are disrupted, timelines collapse, or customer commitments are at risk.The ROI of UrgencyTime-critical shipments are costly—but in the semiconductor world, not acting fast is far more expensive and pose significant consequences. A single line-down event can cost millions of euros per day, depending on the process stage and the customer involved. Compared to that, the premium for a same-day or next-flight shipment is minimal.When companies integrate time-critical logistics as a planned capability, the ROI becomes tangible.Avoided downtime: Faster recovery after supply interruptions directly protects production yield and customer commitments.Reduced inventory buffers: If rapid response capacity is available, less working capital is tied up in safety stock.Customer retention: Reliable continuity strengthens trust and long-term business relationships.In this sense, time-critical logistics isn’t just an operational expense – it’s a continuity investment. It protects revenue streams and reputation and gives manufacturers the agility to respond to whatever the next disruption brings.Example scenarios include:A single fab tool delay can idle an entire production line, costing millions per hour. During the 2024 Taiwan earthquake, a single supplier delay triggered hundreds of millions in global production losses.A next-flight-out or onboard courier shipment typically represents less than 1% of that downtime cost.Rapid recovery also prevents ripple effects such as delayed customer deliveries.The companies that embed time-critical logistics as a strategic capability gain not only cost protection, but competitive agility.From Efficiency to AgilityTraditional supply chains were built for stability and scale: move high volumes, keep costs low, and plan far ahead. But in the semiconductor industry, speed and adaptability now define competitiveness.Agility means having the systems, partners, and mindset in place to act decisively when the unexpected happens. Leading companies are now integrating dedicated control towers, predictive data insights, and predefined emergency logistics playbooks – turning reaction time into a measurable performance indicator. However, agility is not only a matter of infrastructure – it depends on data-driven visibility and cross-industry collaboration.Collaboration as the Real DifferentiatorNo company can face disruption alone. Semiconductor supply chains depend on the combined coordination of equipment makers, material suppliers, foundries, logistics providers, and government agencies.Collaboration is therefore the new competitive edge. Shared standards, visibility tools, and coordinated crisis response frameworks – like those developed under the SEMI Supply Chain Management Initiative – are helping the industry build collective resilience. These cross-functional efforts are where innovation scales.Looking AheadThe semiconductor industry will continue to expand into new regions and technologies. Each step adds complexity and, with it, vulnerability. The next decade will test not just how fast companies can produce, but how fast they can recover. Future disruptions – whether geopolitical, environmental, or digital – are inevitable. The question is not how to avoid them, but how to respond faster and smarter when they occur.That’s where time-critical logistics will continue to make its mark. It is more than just a transport solution. It gives companies the ability to act decisively in moments that matter most – transforming time from a constraint into a competitive advantage that ensures business continuity.Key TakeawaysSemiconductor supply chains are uniquely time-sensitive — a single delay can halt multimillion-dollar production lines.Integrating time-critical logistics improves responsiveness, reduces inventory needs, and safeguards business continuity.Agility, not efficiency, will define the next decade of semiconductor competitiveness.Collaborative industry frameworks like the SEMI Supply Chain Management Initiative are key to building resilience.How ready is your supply chain?Learn more about time:matters’ tailored logistics solutions at SEMICON Europa 2025 (Hall C2, Booth 433), November 18-21 in Munich and attend the company’s presentation on the TechARENA stage on November 19. For more information or to schedule a meeting at SEMICON Europa, click here to contact Remy Schoenzetter.Remy Schoenzetter is Global Head of Business Unit High Tech Semicon at time:matters.[1] Statista: Global semiconductor unit shipments 2021; SIA/WSTS Annual Reports[2] McKinsey: "Need to boost semiconductor fab efficiency?" (2023); LinkedIn Air Monitor analysis (2025); Critical Manufacturing Industry Blog (2024)

The semiconductor and electronics industries are at a turning point. Once defined by efficiency and scale, supply chains now face a convergence of pressures—from geopolitical tensions and climate risks to accelerating innovation cycles. The stakes are higher than ever, but so are the opportunities to reimagine how this global ecosystem operates.The End of “Just-in-Time” as We Knew ItIn 2025, one thing is clear: the old “just-in-time, globally concentrated” supply chain model can no longer carry the industry forward. Trade policies are tightening, export controls are multiplying, and tariff investigations are fragmenting markets that once felt seamlessly connected.At the same time, natural resource risks are mounting. PwC estimates that by 2035, nearly one-third of global semiconductor production could face copper supply disruptions caused by climate change. That figure rises to nearly 60% by 2050 if emissions remain unchecked. Add to this the growing maze of regulatory barriers and import restrictions on raw materials, and the industry faces rising procurement challenges and relentless cost volatility.Demand Isn’t WaitingWhile supply chains struggle with constraints, demand continues its upward climb. Global chip sales are rebounding, driven by innovation cycles in AI, automotive electronics, 5G, and renewable energy. Bringing new manufacturing capacity online takes years. The imbalance is widening, and companies can’t afford to rely on outdated, reactive supply chain models.Resiliency has become mission critical. And as the saying goes: you can’t respond to risks you can’t see. Guesswork isn’t a strategy—especially when disruptions are systemic.Fragility in a Fragmented EcosystemSemiconductor production is specialized and geographically fragmented. A disruption at a single node—whether a mine, a fab, or a logistics hub—can ripple through the ecosystem in days or even hours.Recent shocks have only reinforced this fragility:Trade restrictions are pushing manufacturers to rethink supply chain design.Climate change is endangering raw materials like copper and quartz, both highly water- and energy-intensive to produce.Market volatility is being driven by the explosive rise of AI and data center demand.The lesson is simple: resilience is no longer optional—it’s an existential requirement. And the path to resilience runs through visibility, agility, and collective intelligence.Real-Time Intelligence: From Luxury to NecessityIn today’s environment, quarterly or even monthly reporting cycles are dangerously slow. By the time a shortage, tariff, or logistics reroute appears on the radar, the window to act may have already closed. The cost of waiting—or doing nothing—is steep, and the damage can be lasting.Real-time data and AI-driven insights aren’t “nice-to-have” tools anymore. They are strategic imperatives for supply chains under constant stress. They allow companies to anticipate risks, respond faster, and align more effectively with partners across the ecosystem.Collaboration Is the New CurrencyNo company can go it alone. A chipmaker depends on its suppliers, just as a rare earth miner depends on transport partners. The global supply chain is a living system—and its resilience depends on the strength of its interconnections.Deeper supplier relationships, visibility into Tier 2 and Tier 3 suppliers, and shared intelligence on geopolitical and regulatory shifts are all critical. Resiliency isn’t built in silos; it’s forged through collective action.Building the Future TogetherThe semiconductor and electronics industries stand at the threshold of a new era—one of collective risk but also shared potential. Companies that embrace transparency, real-time intelligence, and collaboration will not just survive shocks, but emerge stronger, more agile, and better prepared to lead.In this new chapter, collaboration is the currency of resilience.That’s where Conductor™ comes in: a real-time intelligence platform built to help industry players anticipate, adapt, and act – together. Conductor weaves all those threads together, delivering not just data, but a shared situational awareness, helping the industry to think and act as a system rather than a collection of silos.What Conductor Enables - and What It Could Lead ToSmarter, faster decisionsA platform like Conductor, which uses near real time data, AI-powered news and alerts, and community-driven insights, turns reactive “damage control” into proactive “risk management.”By bringing together cross-segment, critical KPIs, curated AI news, expert analysis, and peer-community intelligence, Conductor helps teams understand what’s happening now, assess the likely impact on their business, and decide how to respond - faster, and with more context.Over time, this could shift the default mode of the industry from “fire-fighting” to “anticipatory steering.”A more adaptive supply chainAs more organizations adopt the platform, the collective visibility improves. Conductor can power scenario planning, enable early warning systems, and foster agile “micro-pivot” strategies: reroute logistics, adapt sourcing, or reallocate production before a disruption becomes a crisis.New models of ecosystem resilienceWith consistent, shared intelligence, industry players can identify common vulnerabilities and coordinate mitigation for mutual gain. Over time, this could lead to more resilient operations through diversified sourcing strategies, and even shared contingency mechanisms.In short: Conductor is a building block toward a more distributed, more transparent, more resilient global semiconductor ecosystem.Accelerated innovation cyclesWhen the risk of disruption is better managed, companies can operate with more confidence, investing in new capacity, experimenting with new chip architectures, or integrating new markets more aggressively. Technology diffusion accelerates when the fear of “what-if” is reduced.Where We Go From HereConductor is already in early-access pilot phase, and feedback from the SEMI Supply Chain Management Initiative’s Industry Advisory Council is actively shaping its evolution.As adoption spreads, network effects will increase the platform’s predictive power, making it more valuable for everyone involved.In an industry that’s increasingly defined by fast change and high stakes, tools like Conductor shift the balance: from reactive scramble to informed strategy, opaque fragility to visible resilience, and from isolated action to ecosystem collaboration.The future of supply chain resilience starts here. Sign up for early access to Conductor today and help drive the new era of trade.Talal Abu-Issa is Co-CEO and Co-Founder of Beebolt.Krish Dharma is Strategic Advisor, SEMI Supply Chain Initiative.

Political leaders worldwide are investing hundreds of billions to reduce semiconductor dependencies and secure their positions in this nearly $630 billion market, according to the World Semiconductor Trade Statistics (WSTS). Yet the extreme specialization and geographic concentration of the semiconductor supply chain makes complete self-sufficiency economically impractical and strategically questionable.After decades building an intricate global production network optimized for cost and innovation, the industry now faces pressure to splinter into regional blocks. But this raises important questions: Can any nation truly achieve chip self-sufficiency? And would disconnecting from the global ecosystem ultimately hurt competitiveness more than help security?The Independence IllusionThe global semiconductor industry has carved itself into specialized kingdoms. The United States dominates chip design and certain equipment categories, representing about 50% of global revenue. Taiwan controls roughly 67% of global foundry capacity through TSMC—so much so that semiconductors represent one-sixth of Taiwan's total GDP. Europe's strength lies in ASML's advanced EUV lithography technologies, the machines everyone needs but only one company currently makes.China plays an interesting double role too: it's both the largest semiconductor consumer at 50% of the global market and an important producer, holding 31% of total global foundry capacity in 2023.So far, every "independence" initiative has deepened interdependence. The US needs the Netherlands for lithography equipment. Europe needs Asia for high-end chip production. China develops much of its own equipment but remains dependent in key areas. The House of Cards ProblemFor decades, the semiconductor industry perfected making incredibly complex products cheaper every year through extreme specialization. Each company focused on one slice of the supply chain and became world-class at it. But nobody talked about what we built: a house of cards. The entire global economy now depends on a supply chain so specialized that losing even one supplier can shut down entire industries.The COVID pandemic exposed what industry insiders had warned about for years: the chip supply chain works brilliantly until it doesn't. When it fails, it fails spectacularly. The automotive industry alone lost $210 billion in 2021, and some manufacturers still haven't fully recovered.This 2021 chip shortage wasn't just a pandemic problem. Currently, rising geopolitical tensions are changing a supply crisis into a strategic nightmare, forcing countries to rethink their entire approach to semiconductors and their production.The Barriers to IndependenceThe semiconductor industry faces serious barriers that make true independence incredibly difficult for any single nation.First, the supply chain depends on chokepoints controlled by just a few companies in specific regions. Electronic Design Automation tools—essential software for designing any chip—come mostly from three US companies: Synopsys (~31%), Cadence Design Systems (~30%), and Siemens EDA (~13%). Without these design tools, you simply cannot create modern semiconductors. Manufacturing equipment presents an even tighter bottleneck, with ASML holding 100% control of EUV lithography machines needed for advanced chips. Second, the talent shortage makes building new capabilities nearly impossible. By 2030, semiconductor companies will need 1 million additional skilled workers. Developing semiconductor expertise takes a decade of hands-on experience, and most skilled professionals already work in established industry clusters like Taiwan, South Korea, and Silicon Valley. You can't simply relocate these engineers or train new ones quickly enough to staff multiple new regional semiconductor industries.Third and finally, resource requirements exceed what most countries can realistically provide. Building advanced semiconductor chip plants costs $20-30 billion each and they take years to construct before producing a single chip. These facilities consume up to 15 million litres of ultra-pure water daily and large facilities require up to 100 megawatt-hours of power per hour. Beyond the physical infrastructure, technical complexity has made first-time silicon success rates drop to just 14%, while 40% of semiconductor demand still comes from older process nodes, requiring completely separate supply chains for different chip generations.The Trillion-Dollar Investment RaceConcerns about supply chain security have triggered government interventions worldwide. The United States committed $52.7 billion through the CHIPS Act plus additional tax credits. While President Trump initially called for eliminating the program in March 2025, he instead signed an executive order on March 31, 2025, creating the "United States Investment Accelerator" to take over CHIPS Act implementation. TSMC also announced a new $100 billion investment to build five additional chip facilities in the US.Countries across the globe are racing to establish or strengthen their semiconductor capabilities. India has entered the semiconductor competition with its $10 billion Semiconductor Mission and secured investment from Micron Technology, which is constructing a $2.75 billion assembly and test facility. Japan has intensified its semiconductor strategy by establishing Rapidus Corporation with a government support package that is estimated to reach $11.46 billion aimed at revitalizing its domestic chip industry. Meanwhile, the European Union has established a €43 billion Chips Act through 2030, China launched its third "Big Fund" phase in May 2024 with $47.5 billion, and South Korea has developed a $450 billion K-Semiconductor strategy through 2030.These initiatives are changing the semiconductor industry on a global scale. However, complete self-sufficiency would require significant additional global investment and result in 35-65% semiconductor price increases due to suboptimal scale and inefficiencies.What Comes NextThe quest for chip self-sufficiency has become a trillion-dollar global endeavor, with countries placing enormous bets on facilities that may not pay off for years. Complete semiconductor independence remains financially prohibitive for any country, but strategic resilience is achievable.The winners will be those who build the most resilient networks and manage interdependence best. Rather than chasing impossible independence, nations should focus on strengthening their existing advantages while addressing their most vulnerable dependencies. Full independence remains a fantasy, but smart interdependence offers a realistic approach to semiconductor security.Click here to read the full white paper.About the AuthorsJan-Bart Smits is a Managing Partner at Stanton Chase Amsterdam. He began his career in executive search in 1990. At Stanton Chase, he has held several leadership roles, including Chair of the Board, Global Sector Leader for Technology, and Global Sector Leader for Professional Services. He currently serves as Stanton Chase’s Global Subsector Leader for the Semiconductor industry. He holds an M.Sc. in Astrophysics from Leiden University in the Netherlands. David Harap is a Managing Director at Stanton Chase Austin, bringing over 25 years of executive search experience to his role. He has successfully placed hundreds of senior executives and functional leaders across various industries. A Cornell University graduate and Father Kelly Scholar, Harap lectures at the University of Texas at Austin. He is a certified Ambassador for Hofstede Insights, bringing unique insights on organizational culture to his work.

Extended Plateau, Not a New Cycle: The Broader Industry PictureThe current recovery in the semiconductor market appears to signal revival, yet is best understood as an extended phase of the existing cycle—a phase defined less by renewed demand than by structural restraint and efficiency-driven realignment.AI-related demand is indeed driving the rebound, yet this recovery differs fundamentally from past expansionary booms. It is unfolding within an efficiency-driven adjustment phase, where capital expenditure has shifted its focus from capacity expansion to process upgrades and optimization. The observed recovery therefore reflects structural realignment rather than a conventional cyclical upswing.This realignment has created an ‘Extended Peak Plateau’—a state not of cyclical acceleration but of structural transformation. The imbalance between resilient equipment and materials spending and stagnant wafer shipments has produced an uneven recovery, concentrated in select high-value segments rather than evenly across the value chain. The apparent plateau seen today stems less from broad-based demand expansion than from price-anchored growth, sustained by firm pricing in premium segments such as AI-related and high bandwidth memory (HBM) products.At the same time, semiconductor manufacturers—particularly in memory—have adopted a supply-controlled operational strategy, emphasizing process optimization and product upgrades over large-scale capacity additions. Together, these three structural forces—supply/demand imbalance, price-anchored resilience, and efficiency-oriented adaptation—have defined the industry’s current phase, where revenue growth remains elevated but plateaued rather than accelerating or decelerating.In this context, the recent rise in DRAM prices and continued hyperscaler investment hold implications beyond short-term variables: They determine whether the industry can sustain equilibrium without widening the amplitude of future cycles between overheating and contraction. If DRAM recovery remains purely supply-driven, the upturn will likely be shallow; conversely, a slowdown in hyperscaler investment could undermine the demand foundation itself.This is why the report characterizes the current phase not as a “new cycle” but as an extended plateau. While AI-driven momentum has already taken hold, the transition toward a stable and balanced industry structure must pass through the filter of efficiency. This efficiency-based rebalancing will, in all likelihood, require a period of adjustment before a truly sustainable equilibrium — the foundation for the next phase of genuine growth — can emerge.Desynchronization Between Investment and Wafer Demand: Evidence of a Structural ShiftThe chart below visually illustrates this structural asymmetry. When normalized to Q1 2019 = 100, as of Q2 2025 equipment investment has rebounded to roughly 244, photoresist revenue to 200, and total semiconductor revenue to 184—yet wafer shipments remain near 110 and wafer revenue around 103.Diverging Trends Across the Semiconductor Value Chain (Q1 2019 = 100) * Note1. Data sources: SEMI (WWSEMS, Silicon Wafer Shipment, Photoresist Market Data), WSTS, and IR disclosures from the top five wafer suppliers.2. Wafer revenue reflects the aggregated sales of the top five suppliers; Shin-Etsu’s quarterly figures are estimated from 2Q 2021 onward.3. Semiconductor fab equipment investments reflect only wafer-processing equipment (WFE) expenditures, based on the Wafer Processing Equipment category defined in SEMI’s WWSEMS dataset. All indices are normalized to Q1 2019 = 100; wafer area shipments are originally reported in million square inches (MSI), while other indicators represent revenues or investments in U.S. dollars (USD). The data clearly indicate that while equipment and materials have rebounded, wafer shipments and related revenue remain subdued. This divergence is not a matter of cyclical timing; rather, it reflects a re-alignment of the industry’s recovery dynamics, driven by process complexity and efficiency-oriented capital deployment. In other words, the widening gap between investment and wafer industry output symbolizes the industry’s transition from expansion-driven growth to efficiency-driven operations.In previous cycles, the linear linkage of “investment expansion → production expansion” prevailed. Today, however, investment is now synonymous with process-efficiency improvement rather than capacity growth. Behind this shift lie longer cycle times, rising process complexity, and the increasing concentration of demand in AI-related nodes. More complex manufacturing now requires process sustainment, advanced process control, and continual upgrades—CapEx allocation now reflects this shift.At the same time, a clear gap has emerged between wafer revenue and shipment growth, underscoring the divergence between financial recovery and physical output. In other words, shipment volumes have improved, but average selling prices remain subdued, signaling that the recovery is not demand-driven. This indicates that the current phase is sustained not by broad-based demand expansion, but by selective growth achieved through efficiency gains and product-mix adjustments. Despite this widening gap, the industry may give the outward impression of a steady growth plateau, since CapEx spending and high-value segments continue to post solid growth. Yet what appears as stable growth in the semiconductor and equipment market could be, in fact, a structural illusion—a state shaped by process complexity, efficiency-driven investment, and deliberate product-mix management. In short, this perceived growth is the by-product of financial and supply discipline, not the result of renewed demand momentum.Realignment of the Wafer Industry: A Gradual 300 mm-Led Shift Anchored in Efficiency and Portfolio StrategyAs the broader semiconductor ecosystem shifts its focus from expansion to efficiency—and from scale to high value and customer reliability—wafer manufacturers are, in turn, redefining their competitive edge around operational efficiency and the stable delivery of high-value products. The 300 mm wafer segment continues to lead the recovery, whereas 200 mm wafer shipments remain significantly below its 2022 peak, constrained by sluggish demand from legacy and non-memory applications. On the profitability front, depreciation burdens and persistent pricing pressure are creating dual headwinds.To navigate this environment, leading wafer suppliers are pursuing a dual-track approach: renegotiating long-term supply agreements (LTAs) while managing short-term contracts and selective and disciplined pricing to sustain utilization. At the same time, they are optimizing product portfolios to balance cash-flow defense with strategic offense. In this context, the critical question is shifting from “How much can be sold?” to “What kind of portfolio—specifically, how consistently can high-value wafers be sold and delivered?”In essence, performance is now measured less by expansion and investment scale, and more by efficiency, sustainability, and reliability. This strategic realignment mirrors the broader efficiency-driven transition underway across the semiconductor value chain, underscoring that the wafer industry is no exception to the global shift toward disciplined, portfolio-centric growth.Conclusion: The Path to True Recovery — When Three Forces AlignIn summary, the current semiconductor market is best understood as having entered an extended plateau following the peak of the present cycle, with its future trajectory hinging on how effectively DRAM price resilience and Big Tech investment continuity can restore balance. In essence, the outcome will depend on the market’s ability to narrow the amplitude between overheating and contraction, moving toward a more sustainable equilibrium. Rather than focusing on the DRAM price rebound driven primarily by supply adjustments or on demand concentrated in specific sectors, what truly matters for the wafer industry is the structural alignment of three key forces: (1) the recovery of broad-based and genuine demand, (2) the stabilization of the semiconductor supply structure, and (3) the improvement of operational efficiency across the value chain. The moment these three forces align will signal the true onset of the next upcycle — not only for the broader semiconductor market, but also for the global silicon wafer industry.Such alignment rarely occurs quickly — it requires time, discipline, and structural patience.This article distills the key insights from the Market Update section of the Q3 2025 Silicon Wafer Market Monitor Report. In this quarter’s analysis, the focus lies on the semiconductor cycle’s transition into an Extended Peak Plateau — a phase characterized not by broad-based expansion, but by efficiency-driven operations and portfolio realignment. Drawing on shipment, revenue, and CapEx data across wafers, materials, and equipment, this section identifies structural asymmetries between investment and shipment dynamics, and explores how efficiency gains, product-mix optimization, and supply discipline are reshaping the industry’s recovery trajectory.Separate from this focused article, the full SEMI Silicon Wafer Market Monitor Report provides a wider array of charts and indicators, offering a multidimensional perspective on how key variables interact to shape the future of the global wafer industry. Rather than serving as background commentary, the full report aims to deliver data-driven, decision-ready insights that support strategic thinking amid persistent market uncertainty.For more information on the report or to subscribe, please contact the SEMI Market Intelligence Team at [email protected]. Details on SEMI market data are available at SEMI Market Data. Sungho Yoon is a Principal Analyst on the SEMI Market Intelligence team.

The SEMI Semiconductor Manufacturing Cybersecurity Consortium (SMCC) Work Group 3 (Supply Chain Cybersecurity) just released a major work product that will have a significant and lasting positive impact on the industry: the “Standardized Semiconductor Cyber Assessment (SSCA)” questionnaire. Creating a common security assessment process for device makers, equipment suppliers, software suppliers and other members of the global manufacturing value chain has been one of the principal focus areas for the SMCC from its outset. Its aim is to replace the plethora of company-specific questionnaires that are maintained, distributed, filled out, evaluated, and discussed. Given the breadth and importance of this objective, the work group involved expert stakeholders from across the globe, and the quality of their collective efforts reflects the robustness of this approach.This first-of-its-kind resource helps companies:Evaluate cyber readiness and reduce supply chain riskStreamline compliance with one standardized assessmentBuild trust and share results across multiple clientsAlign with NIST CSF 2.0 and industry best practicesHow is the SSCA structured?The questionnaire takes its basic structure from the Capability Maturity Model Integration (CMMI) framework, which is designed to improve and integrate processes across multiple disciplines, such as software development, system engineering, system testing, and even people management. It defines five distinct maturity levels for the relevant parts of an organization or aspects of a major topic (see figure below) with general explanations of what it means to be at a particular level.Source: WikipediaWorkgroup 3 tailored this model to the unique cybersecurity challenges faced by the semiconductor manufacturing supply chain, identifying six activity areas inspired by the NIST Cybersecurity Framework 2.0—Govern, Identify, Protect, Detect, Respond, and Recover. Within each area, there are specific descriptions of the attributes an organization must exhibit to be at a certain level.What does the SSCA include?The SSCA is delivered in multi-tab spreadsheet form with a tab of instructions and a tab of questions. Some of the questions are multiple choice (“Which CMMI maturity level are you, based on the attributes listed?”) and many are Yes/No (“Does the organization use secure technologies to share sensitive data with suppliers?”). In total, there are 165 questions across the six activity areas.The latter is already offered in five languages: English, Korean, Traditional and Simplified Chinese, and Japanese.How can I get the SSCA?Click here and fill out the form to download the SSCA.“Remembrance of Things Past” or has this ever been done before?No… and sort of.Those of you who remember the state of the semiconductor manufacturing industry in the early 90s will recall that one of the biggest problem areas was the poor and inconsistent quality of the embedded equipment control and communication interface software. SEMATECH and its member companies saw this as an ideal pre-competitive domain for the consortium’s focus, so the Manufacturing Systems Division evaluated best practices in the software engineering community of that era and selected the Capability Maturity Model (CMM) of Carnegie-Mellon’s Software Engineering Institute. Sound familiar?While wholly adopting the CMM at that time was beyond the reach of most equipment suppliers, the nugget that emerged was the decision to standardize on a set of “4-Up” charts that conveyed the most basic of software quality metrics. This got everyone using the same vocabulary, definitions, and visualization techniques to compare progress across process areas and timeframes, which was instrumental in identifying and addressing the root causes of the software issues. An example of a typical software quality “4-Up” chart appears below.Source: Techno-pmAnd in related news!Given the WG 1,2 recent (mid-July) release of the SEMI E187 Compliance Guidance document and the formation of the new South Korea Cybersecurity Work Group (WG9), the SMCC is poised to realize its vision of accelerating the adoption of SEMI Cybersecurity standards while creating vital complementary material.For more information or to participate in the cybersecurity working groups at SEMI SMCC, please contact Mayura Padmanabhan at [email protected] Weber is the VP, New Product Innovations at PDF Solutions and a long-time SEMI Standards participant, currently co-leader of the Equipment Data Publication Task Force and Computer and Device Security Task Force.

As the global economy increasingly prioritizes sustainability and climate action, corporate renewable energy procurement has emerged as a critical tool worldwide. To achieve their corporate sustainability goals, businesses have sought to secure renewable energy through Corporate Power Purchase Agreements (CPPA) with renewable energy developers. Overview of System Charges: Their Role and Impact on Corporate Renewable Energy ProcurementCPPAs are one of the common approaches for businesses to procure renewable energy directly from renewable energy developers. Physical CPPAs involve two major cost components – energy costs and system charges. In this blog, we focus on system charges which are fees collected by utilities that include transmission and balancing components. Transmission charges cover the use of grid infrastructure to deliver electricity, while balancing charges cover the cost of maintaining real-time supply-demand stability.Although system charges are a key cost component in physical CPPAs, they are typically not the primary cost drivers. Based on Wood Mackenzie’s cost estimate analysis for a 50-100MW solar CPPA across the various regulated and liberalized APAC markets of Malaysia, Thailand, Australia, Philippines, South Korea, Singapore, Japan and Taiwan, system charges typically make up less than 20% of the total CPPA price. However, this share of system charges in the total CPPA price varies considerably between APAC markets. Australia, the Philippines and South Korea maintain system charges at between 10% - 20% of their solar CPPA prices. Singapore, Japan and Taiwan see the lowest proportion of system charges of solar CPPA prices at 7%, 6% and 5% respectively.Malaysia's Moment: Optimizing SAC for CRESS SuccessAnnounced in July 2024, CRESS allows for physical CPPAs from renewable energy projects of 30 MW and above. While CRESS opens new avenues for businesses to access renewable energy, the implementation of the System Access Charge (SAC), a surcharge imposed on renewable developers for using the Malaysian Grid under CRESS, has raised cost concerns within the industry.Based on Wood Mackenzie’s analysis, Malaysia's SAC account for about 60% of the estimated total CPPA price in Peninsular Malaysia, assuming a solar production cost at USD57/MWh (based on the average of the large scale solar LLS3 LLS4 - bid price range of MYR 0.19-0.28/MWh. The SAC significantly impacts the overall cost structure of renewable energy procurement. Malaysia’s SAC for solar “non-firm supply” under CRESS is currently set at 40sen/kWh or about USD/MWh making them the highest system charges applicable to CPPAs in the region.Another concern relates to cost-transparency and ease of long-term cost forecast for buyers. Most APAC markets demonstrate high transparency in their methodologies for determining system charges. Countries like Australia and Japan provide clear breakdowns of cost components, including grid capital expenditure, operation expenditure, power losses, ancillary services, and market operation costs. Even after analyzing other regulated markets like Thailand (where wheeling and balancing charges are based on UGT 2 tariff rates), Taiwan and South Korea, Malaysia’s SAC lacks transparency in its the system charges determination methodology, compared to three other vertically integrated Single Buyer markets like Peninsular Malaysia. Such cost transparency, including detailed cost components and calculation methodology, is crucial for corporate energy buyers looking to increase predictability of electricity costs by entering long-term CPPAs. The high SAC charge poses a significant barrier to the adoption of renewable energy by industrial end-users like semiconductor manufacturers and makes it challenging for prospective CRESS buyers to understand how these charges may evolve over a 21-year contract period. The SAC under CRESS would be reviewed every 3 years and is subjected to a maximum variation of 15% from the prevailing charge.RecommendationsThe lack of transparency of the SAC could jeopardize Malaysia’s critical development objectives, such as attracting MYR500 billion (USD $110 billion) in semiconductor investments by 2030 under its National Semiconductor Strategy (NSS), or its 40% renewable installed capacity target by 2035 (or about 18 GW by 2035). To address these challenges and create a more favourable environment for both semiconductor investments and renewable energy adoption, SEMI and Wood Mackenzie propose the following recommendations:Benchmarking SAC against transparent and established system charge components: Additional transparency would allow Malaysia to align with practices in both regulated and liberalized markets across the APAC region and allow more players to make long-term investments in Malaysia. Similar cost methodologies to the regulated tariff could be adopted. As an initial step, SAC should reflect Network Charges defined under the regulated tariff, and as a best practice, any differences between the SAC and the Network Charges in the regulated tariff should be clearly explained and justified (e.g. additional balancing costs induced by solar procured under the CRESS may be audited with the Single Buyer).Improving CRESS SAC stability and predictability: Ensuring transparency on the calculation methods behind SAC and its components, and predictable SAC levels, will allow businesses to proactively anticipate and plan for renewable energy procurement expenses, enabling informed decisions and on long-term corporate solar PPAs spanning 20 years’ time horizon under the CRESS framework. In particular, the maximum change in SAC charges can be narrowed down from 15% every three years.4Alignment of national sustainable energy policies: Strengthening policy support and ensuring accessible financing are essential to driving the widespread adoption of renewable energy. CRESS can only succeed if the scheme enables fair, transparent, and competitive access to clean energy. New renewable energy coming online via CRESS should not be put at an economic disadvantage through differentiated system charges from those applicable to other clean energy schemes. For example, no SACs are applied to solar under Large Scale Solar (LSS) projects, despite their system impacts being the same as under CRESS. Sustained efforts to improve affordability within CRESS are crucial for attracting investment, reducing the cost of SAC for buyers, and accelerating Malaysia’s transition to a sustainable, low-carbon future.The Path Forward and ConclusionImproving transparency and stability of SAC is crucial for facilitating Malaysia's development goals in semiconductor investments and renewable energy targets. By implementing these recommendations, Malaysia can enhance its competitiveness in attracting sustainable investments and accelerate its transition to clean energy.As the voice of the global electronics manufacturing and design supply chain, SEMI is committed to working with policymakers, industry leaders, and stakeholders to address these challenges. SEMI and Wood Mackenzie believe that by fostering a more transparent and competitive environment for renewable energy procurement, Malaysia can unlock the full potential of the country’s semiconductor industry while contributing to a more sustainable future.SoYoung Jang manages the SEMI Energy Collaborative programs at SEMI.Antoine Gaudin and Chun Kang Eu are from Wood Mackenzie.

SEMICON West in Phoenix, Arizona, will bring together all of the SEMI Sustainability efforts and programs under one roof over three days. With back-to-back sessions from October 7-9, this year’s Sustainability EHS Program will offer expert insights on the most pressing sustainability topics facing the microelectronics industry. Tuesday will kick off the program and focus on the business aspects of driving to sustainability in the semiconductor sector. On Wednesday, the Pavilion hosts discussions on water risk, water management, circular economy solutions and the needs for innovation from startups. Finally, Thursday will highlight the current emissions landscape, milestones and achievements, and solutions developed by the SEMI Semiconductor Climate Consortium (SCC). The 2025 event also marks the first public discussions of the full scope, findings and status of the SCC’s direction.All three days of the Sustainability EHS Program are sponsored by Edwards, Schneider Electric, TEL, SCREEN, Sundt and the Greater Sacramento Economic Council. Here’s a sneak peek at what the 2025 program has to offer. Registration for SEMICON West is open.The Business of Sustainability – Tuesday, October 7 Sustainability Panel: Path to Success Sustainability hits the keynote stage with Tuesday afternoon with a panel discussion detailing a plan for meaningful sustainability progress. The panel, titled Sustainability Panel: Path to Success—The Semiconductor Industry Leads the Way for a Resilient Future, will take place on the CEO Summit Keynote Stage from 2:35-3:35 p.m. Experts from Applied Materials, BASF, Micron, Google, and Qualcomm will cover strategies on how collaboration, supplier engagement, and clean technology investments are reducing emissions and propelling the industry closer to its sustainability goals. Attendees will discover what’s working, what’s still to come, and how the industry will forge its way toward a more sustainable future.A Musical Performance by Ay YoungIn anticipation of the Path to Success panel discussion, Tuesday will also spotlight an exciting musical guest. AY Young is a singer, songwriter, and the founder of the longest-running clean energy concert series in the U.S. At 2:20 p.m., he’ll take to the CEO Summit Keynote Stage for a memorable performance and give a glimpse into how important sustainability has become to attract a new generation of talent. Through his musical talent and deep commitment to clean energy, Young was appointed as a United Nations (UN) Young World Leader in 2020, helping the organization further its 17 Sustainable Development Goals. His Project17 initiative is a 17-song album, with each song centering on a different goal and backed by a corporate sponsor that aligns with it. Young will also attend the Sustainability Reception from 5-6:30 p.m. at the Sustainability Pavilion Theater.EHS Regulatory OverviewThe wide range of regulatory topics will be showcased in the first session on Tuesday at the Sustainability Pavilion. Expert speakers and advocacy groups will deliver key insights on the threats and challenges, and the research and collaboration opportunities currently at play in the regulatory environment, with special focus on keeping electronics manufacturing strong. Climate Equity Social Impact Workgroup (CESI) Aligning with the theme of the UN Sustainable Development Goals, the SEMI Climate Equity Social Impact (CESI) Working Group will highlight how its members are progressing real-world outcomes for climate, education, and global cooperation. This session will run from 3-4 p.m. at the Sustainability Pavilion Stage, and it’s ideal for anyone in the industry who’s passionate about sustainable partnerships. Innovations Enabling Reduce, Reuse, Repurpose and Recover – Wednesday, October 8Resource Use and Circular EconomyWednesday’s 10:15-11:30 a.m. session, Resource Use and Circular Economy will offer tactical solutions to help fabs reach up to 80-90% circularity. The goal of this session is to lay a foundation for transforming the industry’s circularity concerns into practical opportunities, which will be achieved over two panel discussions. Discussion 1, A Circular Value Chain: Challenges and Leading-Edge Solutions, will highlight solutions for eliminating waste and reducing manufacturing costs through circular technologies. This panel will feature experts from Edwards, Syensqo, and ElectraMet and will be moderated by Subgeni’s Taimur Burki. These subject matter experts will highlight their company solutions, but also other areas they see in need of consideration from a circularity lens, as well as best known practices across fabs. Water is a precious resource, and how the industry manages it is crucial for its long-term success. Discussion 2, Tactical Maturity Scales for Water Management, will unveil two new guides developed by SEMI’s Water Management Working Group. Both products are designed to move manufacturers from both large and small fabs and manufacturing operations to assess their water needs and most efficiently improve water reuse by up to 80%. This panel will be led by speakers from Aquatech, SCREEN, Sundt, Ovivo, and C2MI. Water Resilience Starting at 11:30 a.m. at the Sustainability Pavilion Stage, attendees will hear from the SEMI Environmental Risk Mitigation and Reporting Working Group lead - Senior Sustainable Program Manager – Alua Suleimenova – as she shares her insights and findings from a recently completed study by WaterPlan on industry water risks within the semiconductor value chain. The topic and findings will then be addressed by a panel, where Suleimenova will engage leaders from ASM, Waterplan, ERM, and the Alliance for Water Stewardship, in a conversation about water, nature, and associated corporate risks. Although companies are making strides to protect water access, it’s becoming clear that a focus on internal activities will not move the needle significantly enough for achieving long-term resilience. This panel will offer solutions for adapting water-related risks to the supply chain, with a focus on North America, Asia Pacific, and Europe.Other Wednesday AttractionsSEMI S3 – Startups for Sustainable Semiconductors: SEMI S3, or Startups for Sustainable Semiconductors, is an annual program by the industry’s venture capital divisions designed to boost awareness of semiconductor industry needs by inviting promising startups to be mentored and pitch their solutions to our industry. Earlier this year, 145 candidates submitted applications. Now, it’s down to 15 finalists, who will present at SEMICON West from 2-4:40 p.m. at the Sustainability Pavilion, following a Fireside Chat from experienced innovation experts from 1-2pm.Accelerating Sustainability with Smart Manufacturing – Presentations Poster Session: Technical papers and posters focused on sustainability solutions – from water to energy – will also be presented in the Smart Manufacturing Pavilion from 2-5:15 p.m., providing an opportunity to network with industry leaders and discover the latest best practices for how machine learning and AI can reduce water and waste in fabs.Reducing Emissions – Thursday, October 9SCC – Tackling Emissions Across the IndustryExpect a full-house at Thursday’s all-day session featuring SCC – Tackling Emissions Across the Industry. From 10:15 a.m. to 3:00 p.m., the SEMI SCC leaders and experts will detail its findings and projects addressing the industry’s emissions. SCC has been focusing on ensuring consistent and measurable progress in decarbonizing from 2021 levels. Key topics include: Reporting and aligningBaseline, ambition, and roadmapAbatementLow Global Warming Potential (GWP) gases workLow Carbon Economy (LCE) access and procurementEnergy efficienciesScope 3 upstreamSEMICON West also features SEMI U courses to learn more about sustainability in our industry. For example, on Thursday, SEMI U: PFAS Compounds in Semiconductor Environment, is being offered from 8 a.m. to noon. This course is available for purchase. Support the SEMI Forest community effort to reforest our planet by funding a range of certified carbon avoidance and tree planting projects. Our goal for SEMICON West is to fund planting for 100,000 trees. Scan the QR code below to contribute and help us meet our goal.Learn more about the 2025 SEMICON West Sustainability EHS Program. Follow SEMI Sustainability on LinkedIn for regular updates on sustainability initiatives. Saifi Usmani is Vice President for Sustainability at SEMI.

The SEMI Startups for Sustainable Semiconductors (S3) program announced 15 startups chosen as finalists for pitching to the industry at SEMICON West 2025 in Phoenix, Arizona. The finalists were chosen from a field of 35 semifinalists after a virtual pitch event over 2 days. Startups were evaluated by the organizing committee on five factors: the sustainability impact on our industry, commercial viability of product, company value proposition, the quality of the pitch and the startup team.The committee, made up of experienced Corporate Venture Capitalists (CVCs) from the global semiconductor industry, initially received 145 submissions in all three categories identified for 2025:Sustainable Semiconductor ManufacturingSustainable Data CenterGen AI for Sustainable DesignNow in its 4th year, the program features strong exposure to semiconductor industry CVCs, through the personal mentoring each startup receives. Mentoring topics are tailored to align with the needs and strategic positioning of the startup business plan, and can range from basic introduction to semiconductor manufacturing, to connections to new funding sources. A full analysis of the program over the past 3 years is available here.The SEMI Startups for Sustainability Semiconductor pitch event will take place at the Sustainability Pavilion Stage on Wednesday, October 8 starting at 1:00 p.m. Program lead John Wei of Applied Ventures will open the session and introduce a fireside chat featuring Dr. Om Nalamasu, CTO of Applied Materials and Chair of Applied Ventures and Dr. Melissa Grupen-Shemansky, CTO of SEMI, and moderated by Saifi Usmani, SEMI Vice President of Sustainability. These executives will discuss the role of startups in semiconductor sustainability, along with a variety of related topics. The finalist pitches are scheduled from 2:00 to 4:40 p.m., with each presenter given a 10-minute time slot.Investors are welcome to attend the session at SEMICON West and to register their interest here to learn more about the 2026 program.2025 S3 FinalistsActasys Inc.Brooklyn, NY, USA Actasys has developed a precision cooling solution designed for thermal bottlenecks in semiconductor-driven systems such as networking cards (NICs), DPUs, switches, and optical transceivers. Instead of cooling entire racks or server rooms ActaJet™ targets localized hotspots at the device level, delivering scalable, high-efficiency airflow through a compact, adaptive, and electronically controlled actuator system. AlixLabs ABLund, Sweden AlixLabs AB is developing a disruptive semiconductor manufacturing technology based on Atomic Layer Pitch Splitting (APS). It enables cost-effective and environmentally sustainable scaling of transistor architectures by doubling pattern density without requiring advanced lithography. The core product includes both the APS process and customized etching equipment that integrates into existing semiconductor fab workflows, reducing complexity, cost, and environmental impact.AllonniaBoston, MA, USA Allonnia delivers on-site PFAS treatment with SAFF® (Surface Active Foam Fractionation), a modular system that uses air to naturally separate long- and short-chain PFAS from water. SAFF concentrates PFAS up to 100,000x, minimizing waste and enabling cost-effective, closed-loop management alongside any destruction technology. This plug-and-play solution helps fabs meet strict regulations while advancing sustainability goals with low OPEX and seamless integration into existing operations.AlsemySeoul, South Korea Alsemy is building an AI-powered platform that bridges Manufacturing Execution Systems (MES) and EDA domains enabling fabless engineers to reflect manufacturing data characteristics in their chip designs, while process engineers can make data-driven decisions to optimize manufacturing processes for maximum chip performance. By connecting these traditionally siloed areas, a feedback loop is created to drive efficiency and innovation across the semiconductor value chain.Arieca IncPittsburgh, PA, USA Arieca's adaptable Liquid Metal Embedded Elastomer (LMEE) technology, which blends liquid metal and polymer, delivers both thermal performance and mechanical reliability. LMEEs are a cost-effective, dispensable emulsion that is compatible with existing high volume manufacturing tools and allows for low pressure spreading and excellent wetting. CuspAICambridge, UK CuspAI is building an engine that combines Gen AI models, virtual twins, and active learning pipelines for simulation to develop sustainable materials solutions that address critical environmental challenges, including, environmentally-friendly etching reagents, specialized sorbents for emissions capture, and novel catalysts for manufacturing waste remediation. The engine has already proven successful in designing metal-organic frameworks (MOFs) for carbon capture and PFAS removal from water.FlexiramicsEnshede, The Netherlands Flexiramics® is a breakthrough flexible, 100% ceramic fiber material designed as a drop-in replacement for glass fiber in PCBs. By enhancing thermal conductivity and reducing signal loss, it enables semiconductor manufacturers to build faster, cooler, and more reliable devices. This translates into higher performance, longer lifetimes, and greater efficiency for next-generation chips and advanced electronic systems.icspiKitchener, ON, Canada icspi has developed the microAFM, a scalable atomic force microscope (AFM) on a 1 mm^2 MEMS scan head, 1,000,000x smaller than conventional AFMs. MicroAFM technology enables parallel arrays of thousands of devices for sub-nanometer metrology and inspection with unprecedented throughput, accelerating time-to-yield and reducing scrap.Mixx Technologies, Inc.San Jose, CA, USA Mixx Technologies is a deep-tech startup building next-generation optical interconnect solutions to deliver non-blocking, energy-efficient data movement. The advanced 3DS platform enables petabit level end-to-end connectivity for AI workloads resulting in sustainable, efficient, and cost-effective scaling. The 3DS platform comprised of the engine, package and system, enables seamless deployment of the optical IO chiplet.Point2 TechnologySan Jose, CA, USA Point2 designs and manufactures mixed-signal interconnect SoCs for terabit data transmission, to overcome the barriers of copper and optical cabling to accelerate AI interconnect in GPU cluster scale-up. e-Tube technology uses an RF Transmitter SoC to convert data from the electrical to the RF domain for transmission over plastic waveguides, with the RF Receiver SoC converting the data from the RF domain back to the electrical domain.PROUDLausanne, Switzerland PROUD's patented diamond-layer technology with the highest heat dissipation capacity ( 1000 W/m.K) of any existing material, deposited on chips, allows a direct upgrade in heat extraction, power output and efficiency.SKYRE, Inc.East Hartford, MA, USA SKYRE, Inc. is a pioneer in hydrogen technology, developing innovative solutions to support a clean energy future. From hydrogen recycling, purification and compression, to sustainable energy systems, we deliver environmentally responsible innovations in high-efficiency, zero-waste hydrogen and carbon transformation technologies—cutting costs, boosting industrial productivity, and reducing environmental impact.SyentaSydney, Australia Syenta has developed LEM - Localized Electrochemical Modelling - a process for depositing metal patterns using a local electrochemical process. The pattern is created on a stamp, which then prints the pattern on the substrate in an additive process.Vionano Innovations IncSt. Paul, MN, USA VioNano Innovations is building a patterning platform to enable advanced feature scaling using self-assembling polymer brush materials. The system enables polymers over 193 nm DUV lithography patterns to double feature density without requiring ALD/CVD or etch steps. The result is a low-energy, high-resolution process for sub-20 nm features using existing infrastructure.XLYNX MaterialsVictoria, BC, Canada XLYNX designs and manufactures a revolutionary family of polymer crosslinkers. These reagents are uniquely able to cure virtually ANY aliphatic polymer, by harnessing high-yielding insertions to carbon-hydrogen bonds. Curing can be triggered thermally (at temperatures as low as 80°C) or photochemically (using either UV or blue light). Heidi Hoffman is Senior Director, Marketing Sustainability at SEMI. Saifi Usmani is VP, Global Industry Sustainability Programs at SEMI.