Virtual, Online
United States
United States
The passage of the CHIPs Act and the Inflation Reduction Act have created opportunities and challenges for the semiconductor industry supply chain. Join industry professionals as we discuss the implications of this legislation and how materials companies can make the most of it.
10:00 am - 11:00 am Off Add to Calendar Disabled America/Los_Angeles 2Co-Organizer

Supporting Partners
This course will cover:
-
Substrate and PCB fabrication processes and its key processes and materials such as ABF, BT, FR5, etc.
-
Build-up micro-via technologies with use of lasers, plasma, photo materials etc.
-
Registration and tolerances of substrate design in relation to substrate and PCB fabrication processes which includes via to pattern, pattern to resist etc, which can affect microelectronics assembly processes.
-
Materials, design and surface finishes (Cu, NiAu, ENIG , NiPdAu etc) with respect to assembly processes and parameters.
-
Substrate defects and package reliability including failure of fatigue, kirkendall voids and intermetallics.
Why should I attend?
- Provides necessary technical knowledge for industry professionals
- Enhance knowledge in manufacturing and R&D know-how in IC packaging
- Case studies discussion
- Networking Opportunity with industry peers
Who should attend?
- Directors, managers, process engineers, R&D engineers working in the areas of microelectronics
- Useful for sale or application engineers who supply packaging materials and tools to the industry
Malaysian International Trade & Exhibition Centre (MITEC)
No. 8 Jalan Dutamas 2
50480 Kuala Lumpur
Kuala Lumpur
Malaysia
Note: Program is subject to changes.
Opening Address by Invest Selangor
Substrate & PCB Materials and Fabrication Flow
- Introduction
- Core Materials – FR4, BT, ABF etc.
- Key Processes
- Mechanical, laser drilling
- Patterning exposure, develop, etch, strip
- Electroless and electrolytic plating
- Lamination and buildup
- 2 Layer fabrication flow
Lunch
Design and Tolerances Affecting Packaging
- Mechanical registration and tolerances
- Cu patterning registration and tolerances
- Solder registration and tolerances
- Substrate challenges and constraints
- Plating finishes
- Problem solving exercises on Assembly Challenges
Q&A Discussion
End of Day 1
Assembly Challenges and Defects
- Assembly differences in PCB and substrate
- Surface finishes for assembly
- Substrate surface finishes for packaging, soft Ni/Au for wirebonding, ball attach
- PCB surface finishes for 2nd interconnect, ENIG, NiPdAu and Cu with OSP
- Strip warpage
- Thermal stress and shrinkage affecting warpage
- Slots, Cu patterning and solder resist thickness impacting warpage
- Other assembly challenges
- Solder cracks, solder balling, component lifting, poor wetting, flux residue
Lunch
Reliability
- Interconnect reliability
- Intermetallic failure, interdiffusion
- Fatigue and creep failure
Q&A Discussion
Lucky Draw
End of Workshop
Interaction of Substrate and PCB to Microelectronics Packaging Assembly and Reliability
Substrate and PCB technologies are the building blocks for Microelectronics Packaging and surface mount packages.
Course Fee:
Member Rate: SGD 750
Non-member Rate: SGD 935
Register before 6 March 2023 to enjoy Early Bird rate of up to 15% off the rates above.
This workshop is HRDC Claimable, subjecting to terms and conditions.
Certificate of completion will be awarded at the end of the workshop.
Off Add to Calendar 2023-03-08 00:00:00 2023-03-09 00:00:00 [IN-PERSON] Advanced Packaging Training Seminar 2023 Interaction of Substrate and PCB to Microelectronics Packaging Assembly and Reliability Substrate and PCB technologies are the building blocks for Microelectronics Packaging and surface mount packages. Course Fee: Member Rate: SGD 750 Non-member Rate: SGD 935 Register before 6 March 2023 to enjoy Early Bird rate of up to 15% off the rates above. This workshop is HRDC Claimable, subjecting to terms and conditions. Certificate of completion will be awarded at the end of the workshop. Malaysian International Trade & Exhibition Centre (MITEC) No. 8 Jalan Dutamas 2 50480 Kuala Lumpur Kuala Lumpur Malaysia SEMI.org [email protected] Asia/Singapore public Asia/Singapore
Substrate and PCB technologies are the building blocks for Microelectronics Packaging and surface mount packages
This course will cover:
-
Substrate and PCB fabrication processes and its key processes and materials such as ABF, BT, FR5, etc.
-
Build-up micro-via technologies with use of lasers, plasma, photo materials etc.
The discussion will help attendees understand why and how governments implement trade controls, what “exports” are and how they take place in different business contexts, and common due diligence methods – such as customer screening – that United States companies use to incorporate regulatory compliance into their business processes. Finally, the discussion will address recent regulatory updates which address current issues such as US-China trade relations and the anticipated effects of those regulations on the US semiconductor design ecosystem.
Meet the Speakers

Ada Loo
Group Director and Associate General Counsel,
Cadence Design Systems
Biography
William Duffy
Corporate Counsel (Government and Trade, Cadence Legal)
Biography
Hosted by
Cadence Design Systems
2655 Seely Avenue
San Jose, CA 95134
United States
The ESD Alliance Export Committee will hold a seminar called “The Impact of New Regulations on the Semiconductor Design Ecosystem.” This seminar is presented by the ESD Alliance, a SEMI Technology Community, and will be hosted by Cadence Design Systems at their San Jose Headquarters. The Cadence Government and Trade Team will cover general trade compliance concepts, how export control and sanctions regulations affect the industry, as well as current trends and emerging issues.
Breakfast Hosted by Cadence
8:30 am - 11:00 am Off Add to Calendar 2023-04-26 08:30:00 2023-04-26 11:00:00 ESD Alliance Export Seminar The ESD Alliance Export Committee will hold a seminar called “The Impact of New Regulations on the Semiconductor Design Ecosystem.” This seminar is presented by the ESD Alliance, a SEMI Technology Community, and will be hosted by Cadence Design Systems at their San Jose Headquarters. The Cadence Government and Trade Team will cover general trade compliance concepts, how export control and sanctions regulations affect the industry, as well as current trends and emerging issues. Breakfast Hosted by Cadence Cadence Design Systems 2655 Seely Avenue San Jose, CA 95134 United States SEMI.org [email protected] America/Los_Angeles public America/Los_Angeles 1The Fourth Industrial Revolution, or Industry 4.0, revolutionized automation monitoring, enhanced production efficiencies, and improved product quality. Industry 5.0 is the next industrial revolution coming to the forefront.
Industry 5.0 builds and adapts the components of Industry 4.0 (robotization, automation, IoT, connected machines, smart systems, data analytics, AI, ML) with a focus on sustainability, environmental, social, and well-being of the worker, and optimized human-robot interactions.
With the renewed interest in on-shoring manufacturing in the United States, this breakfast forum is a great opportunity to learn about Industry 5.0 and the ecosystem partners developing these future ideas.
Join the conversation on—
-
Market Trends, Forecast & Outlook
-
Industry 4.0 + Transition to 5.0—Challenges + Solutions
-
Digital Journey–AI/ML, Autonomous Solutions, Digital Twin, etc.
-
Supply Chain / Disruptions: Linear to Circular Economy and Localized Sourcing
-
Green Factories of Future—Sustainability
-
Talent Gap for Upcoming Transformation
Hosted by
Event Contact
Lin Tso | Sr. Program Manager | [email protected]
Analog Devices—ADI
OR
United States
FRIDAY, MAY 12, 2023 | PACIFIC TIME
Check-In and Breakfast
Welcome Remarks - SEMI Pacific Northwest Chapter Co-Chair
Keynote —Analog Devices— Reinventing a Legacy Wafer Fab
Semiconductor Construction in United States
Smart Manufacturing: Legacy Fab Life Extension
Break
Methods to Mature Your Automation Intelligence
Digitalization: An Evolution to Improve Productivity and Sustainability
Digitalization: An Evolution to Improve Productivity and Sustainability
Enhancing the Work Experience
Tour of Analog Devices
IN-PERSON AND VIRTUAL EVENT
Hosted by Analog Devices
Presented by the SEMI Pacific Northwest Chapter
Health and Safety
We Are Excited to Welcome You Back to the Pacific Northwest Forum
Your health and safety are our top priority. SEMI Americas (“SEMI”) monitors developing federal, state, and local health and safety recommendations and requirements to determine the most appropriate safety protocols for our in-person events.
SEMI will comply with and follow current facility and local government jurisdiction guidelines of the venue's location. The health and safety guidelines outlined below continue to evolve and will be updated as necessary to help support a safe experience for all attendees onsite.
FACE COVERINGS
- Although masks are not required, attendees are encouraged to determine use based on their own personal comfort level as well as to be respectful of other's individual choice.
RELEASE AND WAIVER FORM
- This was included in your online registration.
ADDITIONAL SAFETY PROTOCOLS
- Please practice social distancing.
- Wash and sanitize your hands frequently.
- Avoid handshakes.
- Wear your attendee badge at all times to indicate that you have gone through the health screening process.
SEMI is committed to upholding the health and safety standards outlined on this page. We will continue to monitor the guidance of public health authorities and government agencies going forward and will make appropriate adjustments in the future based on that guidance. Additional details about policies and procedures will be posted here as they are made available.
Subject to Change. Updated August 18, 2022
Registration
Member Price: $49
Non-Member Price: $99
Registration is final. No refunds provided. No substitutions.
Lin Tso
Email: [email protected]
Phone: +1.408.943.7920
Become a Sponsor
Sponsorships can be tailored to meet your branding and marketing objectives. Become a sponsor and brand your company at the Silicon Valley & Northeast Virtual Forum.
Contact Lin Tso, [email protected] or Paul Cohen, [email protected] to learn about available sponsorship opportunities.
Semiconductor Outlook: Navigating Through Turbulent Times and the Impact of the Recession
Businesses across the globe faced a host of new challenges during the recent pandemic. As the pandemic wanes, we are now faced with recession as high inventories and low demand could mean trouble for semiconductor chip manufacturers.
Join us to hear industry leaders and market experts discuss the outlook and the impact on semiconductor design and manufacturing supply chain in the near and long term, including regional and global economies, and the CHIPS Act.
Speakers will discuss strategies for mitigating the impact and how to capture value.
Topics include:
-
Market Trends & Forecast & Outlook
-
Accessing Chips Act Funding and Roll out of Incentives
-
Geopolitical Impact
-
Advanced Packaging & Chiplets
-
Emerging and Expanding Markets
This Virtual Forum is 8:30–11:00am Pacific Time, 11:30am–2:00pm Eastern Time
United States
Virtual Forum | Thursday, March 16, 2023 | Pacific Time
Welcome Remarks
An Update on the CHIPS Act and How to Apply for Funding
The State of EDA: A View from Wall Street
New Perspectives in Semiconductors: Cycles & Outlooks
Status of the Advanced Packaging Industry: How the Chiplet Revolution is Impacting the Industry?
The Impact on Supply Chains - Materials & Equipment Consumables
Q&A and Closing Remarks
The SEMI Silicon Valley and Northeast Chapters Present:
Semiconductor Outlook: Navigating Through Turbulent Times and the Impact of the Recession
8:30 am - 11:00 am Off Add to Calendar Disabled America/Los_Angeles 2Diamond
Gold
Become a Sponsor
Meet your branding and marketing objectives with a customized sponsorship package. Become a sponsor and brand your company to an influential audience of executives at ESDA/CEDA Phil Kaufman Awards.
Contact Tim Janes, [email protected], +1.720.939.4992 to learn more.
Sponsorship opportunities are available! (View the brochure.)
For information, contact Tim Janes, [email protected].
View Past Phil Kaufman Award Recipients
Hosted by
![]()
Hayes Mansion
200 Edenvale Avenue
San Jose, CA 95136
United States
Phil Kaufman Honoree
Master of Ceremonies
Tribute Presenters
The Phil Kaufman Award honors individuals who have had a demonstrable impact on the field of electronic system design through technology innovations, education/mentoring, or business or industry leadership. The award was established as a tribute to Phil Kaufman, the late industry pioneer who turned innovative technologies into commercial businesses that have benefited electronic designers.
6:30 pm - 9:00 pm Off Add to Calendar Disabled America/Los_Angeles 1Registration
Registration covers all 3 days of Workshops. No discounts given for partial attendance. Full refunds through December 17, 2022. December 18-January 19 - substitutions only.
SEMI, FlexTech, NBMC & NextFlex Members: $199
Non-Members: $499
If you have any questions, please contact Gity Samadi, [email protected].
Hotel Information
SEMI has secured a Group Rate at the Staybridge Suites at 321 Cypress Drive, Milpitas, CA, at the special rate of $202/night with breakfast included.
To reserve the rate visit Staybridge Suite website and follow these steps:
Step 1 – Enter your dates
Step 2 – Choose Rate Preference, then group rate, type in SJ1
Alternatively, you may email the General Manager at [email protected]
HEALTH AND SAFETY
Your health and safety are our top priority. We monitor developing federal, state, and local health and safety recommendations and requirements to determine the most appropriate safety protocols for our in-person events. For international attendees arriving from outside of the United States, please review the government travel guidance to confirm eligibility and requirements for travel.
FACE COVERINGS
-
Although masks are not required, attendees are encouraged to determine use based on their own personal comfort level as well as to be respectful of other's individual choice.
SEMI FlexTech FHE Technical Gap Analysis Workshop - Tues. 1/17 - 8 am-12 noon
@ SEMI - 673 S. Milpitas Blvd - Milpitas, CA
During this workshop the attendees will complete a Technical Gap Analysis in preparation for FlexTech’s next Request for Proposals (RFP), including exploring topics and technology development required to meet development objectives. Lunch will be served following the workshop.
SEMI NBMC Technical Gap Analysis Workshop - Tues. 1/17 - 1:00-5:00 pm
@ SEMI - 673 S. Milpitas Blvd - Milpitas, CA
Attendees will turn their sights to preparing the technical topics / gaps in the Nano-Bio Materials space to explore topics and technology development required to meet development objectives. A networking reception will follow the workshop.
SEMI FlexTech - FHE Standards Workshop - Wed 1/18 - 8:00am - 1:00pm
@ SEMI - 673 S. Milpitas Blvd - Milpitas, CA
Many topics and paths were identified at the previous, very successful workshop in July 2022. This workshop will take the work a step further and create scopes of work for this very important foundation required to propel the design in of FHE-based components. This workshop includes a continental breakfast and lunch.
NextFlex - Hybrid Electronics for Advanced Packaging Workshop - Wed 1/18 2:00 - 7:00 pm & Thurs 1/19 - 8:00 am - 5:00 pm
@NextFlex, 2244 Blach Place, Suite 150, San Jose, CA
As the community awaits the release of request for proposals (RFPs) for programs within the CHIPS and Science Act, NextFlex is hosting a workshop to align the ecosystem’s vision on how additive hybrid electronics manufacturing can shape the future of domestic advanced semiconductor packaging. Join us for presentations from visionary speakers on how their organizations plan to participate in the CHIPS and Science Act programs and participate in breakout sessions focused on information sharing, proposal concept refinement, and formation of proposal teams.
Breakout topics include:
- Direct Write Interconnects
- Substrates and Buildup Layers
- Interposers, Bridges & Architectures
- Circuitization
SEMI & NEXTFLEX
Milpitas & San Jose, CA
United States
Tuesday, January 17 @ SEMI Milpitas
Continental Breakfast
SEMI FlexTech FHE Technical Gap Analysis Workshop
Introduction
RFP Process and Background
A Look Back and The Path Ahead & RFP Process
Breakout Sessions for Technical Gap Analysis
Break
Break out Review & Summary
Wrap-Up
Lunch
NBMC Technical Gap Analysis Workshop
Introduction
NBMC 2023
RFP Process & Insights
Break
NBMC Break Out Sessions
Final Review & Summary
Wrap-Up
Reception & Networking
Wednesday, January 18, 2022
FHE Standards Workshop
Continental Breakfast
Introduction of Project & Status
The Need for Standards in Flexible & Printed Electronics
Breakout Session on Selected Topics
Break
Review and Summaries from Breakouts
Wrap-Up
Lunch
Travel Time to NextFlex -
For a detailed program agenda for this workshop visit NextFlex.us
Join us for three-days of technology assessments, updates, discovery and planning workshops focused on the development of the electronics ecosystem and flexible, hybrid electronics, medical monitoring sensors, and their application to driving development in new electronics packaging approaches.
Industry experts and leaders will come together to focus on identifying gaps in technology development, including in design, manufacturing, standards and environmental sustainability.
8:00 am - 5:00 pm Off Add to Calendar Disabled America/Los_AngelesRegistration
SEMI Members: $49
Use your corporate email address during log in to be recognized as a SEMI Member.
Non-Members: $99
Students: Free
Contact Gity Samadi ([email protected]) with a picture of your student ID to receive your discount code.
Flexible hybrid electronics (FHE) is an emerging manufacturing methodology that combines the best of conventional and printed circuitry. By enabling flexibility and digital manufacturing without compromising on processing capability, it promises to remove the constraints of rigid PCBs while reducing costs and hence enable new applications.
This webinar from Dr Matthew Dyson of IDTechEx provided the status of FHE, including examples that are already commercialized.
Standards and other attributes required for mass manufacturing was outlined, and the scope for FHE to be used for novel applications (including harsh environments) assessed. Finally, a roadmap covering the near, medium, and long term was presented, including how FHE development fits with the ongoing development of heterogeneous integration.
ABOUT THE SPEAKER
Matthew is a Senior Technology Analyst at IDTechEx, specializing in printed/organic/flexible/hybrid electronics and sensors. He has an MRes and PhD in Physics from Imperial College London, which aimed to better establish processing/structure/property relationships in organic semiconductors. This was followed by two years post-doctoral researcher at Eindhoven Technical University in the Netherlands, focusing primarily on organic photodetectors (OPDs). His academic research, which has been cited over 500 times, also included work on perovskite photovoltaics and aggregation induced emission materials.
At IDTechEx, Matthew analyses technical innovations and applications across the printed/flexible/hybrid landscape, attending multiple conferences and interviewing companies to establish a clear picture of the technical and commercial landscape. This analysis is published in reports on topics such as 3D electronics and printed/flexible sensors, and applied to consulting projects evaluating commercialization opportunities across printed/flexible electronics. He also manages a team of analysts covering wearable technologies, AR/VR, and emerging photovoltaics.
United States
This webinar featured Dr. Matthew Dyson of IDTechEx outlining the status of FHE, including examples that are already commercialized. Standards and other attributes required for mass manufacturing were discussed, and the scope for FHE to be used for novel applications (including harsh environments) assessed. In addition, he presented a roadmap covering the near, medium, and long term will be presented, including how FHE development fits with the ongoing development of heterogeneous integration.
8:00 am - 9:00 am Off Add to Calendar Disabled America/Los_Angeles