Technology and Trends

The automation of semiconductor factories through digitization is reshaping Smart Manufacturing to streamline the connectivity and orchestration of manufacturing processes across the entire supply chain. But the threat of cyberattacks and viruses looms. An estimated 26 billion smart and connected manufacturing devices are expected to be online by next year. Never before has the need been greater to protect the staggering volume of manufacturing data traversing increasingly intricate supply chain networks.“We are living in the time of digital manufacturing,” said Chen Chi-Hsien, Director of TSMC’s Manufacturing Technology Center. “Processes ranging from assembling equipment and upgrading hardware and software are increasing security challenges for semiconductor manufacturers. With viruses and malware constantly evolving to pose greater threats, all members of the supply chain – from manufacturing and equipment to operating system and software/firmware providers – should work together within the SEMI Smart Manufacturing platform to establish cybersecurity standards across the industry. Doing so will also enhance the development of smart manufacturing and accelerate digitalization.” Representatives from Tongfu Microelectronics, Adlink, NSHC, ABB, TSMC, ASE and Microsoft with SEMI CMO and SEMI Taiwan president Terry Tsao (left to right) Chi-Hsien offered his insights at the SEMI Smart Manufacturing and Cybersecurity Seminar, joining speakers from other leading semiconductor manufacturers including TFME and ASE to discuss the latest smart manufacturing trends and cybersecurity challenges. The April event in Hsinchu also featured representatives from ABB, Adlink, Microsoft, Rockwell, Siemens, Delta Electronics and the National Center for High-Performance Computing (NCHC) offering their views on how the semiconductor industry can speed its digital transformation using various technologies.With its 43 years’ experience in developing international standards, SEMI is committed to serving as the platform to establish universal information security standards for silicon wafer plants and semiconductor equipment, Terry Tsao, SEMI chief marketing officer and SEMI Taiwan president, said at the seminar. Tsao added that SEMI is now in discussions with leading semiconductor manufacturers to establish a communications framework for addressing potential security risks and facilitating the development of risk management and security solutions that safeguard the semiconductor supply chain.This year SEMI will debut its SMART Manufacturing EXPO to gather key supply chain players for critical discussions about security and to feature AI manufacturing and cybersecurity solutions. Co-located with SEMICON Taiwan, September 18-20, 2019, at TaiNEX 1 (Taipei Nangang Exhibition Center, Hall 1), the SMART Manufacturing EXPO will include Smart manufacturing hardware and software providers from around the world for the interdisciplinary discussions and collaboration key to developing strong Smart manufacturing security.For more information about the SEMI Smart Manufacturing Platform, contact Emmy Yi of SEMI Taiwan at [email protected] Yi is a marketing specialist at SEMI Taiwan.

Imagine a world where there are chips in about everything we touch on a daily basis. It is not hard to do with semiconductors already at the core of many leading-edge electronic devices. These sophisticated chips are hidden from sight, but their functions are vitally significant to our daily lives.Manufactured in multibillion-dollar facilities, the production process of chips is one of the riskiest, costliest, and most technically complex feats in business. Consider the difficulties of managing contaminants during device manufacturing: A single speck of dust on a lens could cause the entire output of the plant to be scrapped.For years, these exotic fabrication facilities, called fabs, have been packing more efficiency into ever smaller chips. As new technologies continue to emerge, chip manufacturers face constant pressure to continually refine and improve their operations to meet the challenge of rising device performance and yield goals. Fab managers must optimize tool performance, improve fabrication techniques, safely handle toxic materials and design better integration flows. Layer on top of those requirements customer demand for greater innovation and quality of service, it can be difficult for manufacturers to handle everything on their own while consistently meeting necessary requirements.Align for CollaborationWith the help of the Fab Owners Alliance (FOA), a SEMI technology community, manufacturers and their suppliers don’t have to travel this road alone. Membership in this international group allows semiconductor and MEMS fab managers and industry suppliers to come together to solve common non-competitive manufacturing issues and improve business results.Founded in 2004, the group consists of 25+ device manufacturers (DMs) with over 120 semiconductor manufacturing facilities and 60+ solution providers (SPs) who supply equipment and services. Through quarterly meetings, study teams, benchmarking surveys, case studies and online forums, FOA successfully provides a collaborative, non-competitive platform to the fab management and operations community. FOA members enjoying an engaging discussion and networking event during the recent Q1 2019 Collaborative Forum at the Double Tree Resort in Scottsdale, Arizona One of the most popular FOA platforms is the annual Collaborative Forum early in the year. The goal is to bring together DMs and SPs from around the world for an open dialogue under one roof. For two days, they share success stories and discuss issues facing their fabs and the industry in general and develop collective strategies to address them.The success stories are particularly engaging as they accentuate the value and benefits of FOA membership. Presented as case studies, these stories outline how the DMs and SPs work together to improve fab efficiency and increase yields. Often, the ideas for the case studies are conceived during networking events, fab tours and programs organized by the FOA.The case studies shared at the 2019 Collaborative Forum, held at the Double Tree Resort in Scottsdale, Arizona, February 13-14, 2019, illustrate the power of collaboration within the FOA. Following are a few examples.Scheduling System Implementation Broadcom was facing a steep ramp when it decided to engage with FPS, an INFICON product line. In addition, the manual decision making, and limited real-time visibility of factory data was negatively impacting their production in its 150mm and 200mm environment. By deploying an integrated Smart Manufacturing software solution and its digital twin, FPS was able to retrofit Broadcom’s manual factory with automated decision-making capabilities.This solution offered many benefits. Constraint tool utilization increased by more than 15 percent. The automated WIP management system also eliminated many manual wafer handling issues such as lost lots, WIP storage constraints, building transfers, and time spent looking for lots. Pushing Tool Performance BoundariesAs tools in the 200mm space are hard to find, GLOBALFOUNDRIES is always looking to squeeze every wafer out of its existing resources. To drive continuous improvement and increase equipment throughput, GLOBALFOUNDRIES leveraged MAX’s knowledge with Machine Rate Models. Together, they were able to employ a modelling technique that helped them model key toolsets and develop actions to increase intrinsic machine rate performance.Based on this knowledge, 10 capacity constraints were selected, and speed models were developed for all of them. This win-win collaboration allowed GLOBALFOUNDRIES to find some real opportunities that translated into CAPEX and cost savings. On average, the companies identified a 12 percent potential improvement opportunity per toolset and created engineering task force teams to prioritize and drive the improvements.Simplifying the Chamber Matching Process Using Trace AnalyticsThe collaboration between NXP and BISTel resulted from a shared vision of achieving Smart Manufacturing using analytic solutions enabled by artificial intelligence and other advanced technologies. Chamber matching is critical in identifying process variation to ensure manufacturing quality. Traditional tools like Fault Detection Classification (FDC) often do not provide clear enough insights to pinpoint the issues and require extensive time to collect data from each chamber.Through several use cases, NXP and BISTel successfully illustrated the effectiveness of using a trace analytic solution to quickly and accurately quantify and monitor chamber-to-chamber mismatches as well as changes within a chamber over time. The full trace analyses of all parameters allowed NXP to generate better FDC models to more quickly detect similar issues in the future. In addition, NXP was able to identify the cause of a parametric shift by comparing performance of the same chamber between two different time periods. All in all, the trace analytics solution brought together and analyzed the process data efficiently, thereby reducing analysis time from days to minutes.Eagleview Inspection of SiC and Transparent Wafers X-FAB challenged Microtronic to develop a new capability for its high-throughput recipe-less macro defect inspection systems. Microtronic’s EagleView machine vision macro defect inspection system is well known for its versatility in the semiconductor industry due to its wide deployment as well as its recognition as winner of the 2017 Best of West Award at SEMICON West. But X-FAB’s requirements to inspect and image transparent wafer substrates were novel. After working closely to understand X-FAB’s needs, Microtronic made extensive hardware and software enhancements to enable high-throughput macro inspection of Silicon Carbide (SiC) and other transparent wafer substrates.Get InvolvedThe FOA meetings are held at device manufacturing sites twice a year. The next meeting will be graciously hosted by MACOM in Lowell, Massachusetts, May 22-23, 2019. The DMs and SPs will meet again at SEMICON West at the Moscone Center in San Francisco on July 11, 2019.To attend these meeting and be part of this high-impact group, please email us at [email protected]. For more information about FOA, please visit our website.Nishita Rao is a marketing manager at SEMI.

Why FD-SOI? What can you do with it that you couldn’t do before? That was the big question from IHS Markit’s Matthew Short that kicked off the first panel discussion at the SOI Consortium’s Silicon Valley Symposium. And there were some great answers.VeriSilicon, Analog Bits and Silicon Catalyst were among the consortium members with stands at the SOI Symposium, Silicon Valley 2019.Here in this final part of our coverage of the event, we’ll detail who said what in the two panel discussions, as well as the presentations by Leti, Intento Design the SOI Consortium’s IP/EDA roundup.If you missed the previous two installments of our coverage, you can catch up on the rest of the presentations in part 1 (NXP, Samsung more) here and part 2 here (Synaptics, GlobalFoundries more). Almost all of the presentations are now freely available under "events" on the consortium website - or just click here to get them.How FD-SOI Changes What You Can DoThe presentation by Matthew Short, Sr. Director of IoT Technology at IHS Markit, was not specific to SOI, but it sure did lay out out the market opportunities. Entitled IoT, 5G, ADAS and AI Market, it’s available on our website. Matt spent most of his career in chip design at NXP/Freescale, so he really has an engineer’s perspective on where this all is going. At IHS Markit, they define IoT as anything with an IP address. Over the past year more than 10 billion devices were shipped, and there were more “things” than cellular handsets, so the world has really changed. He outlined the growth drivers, suggested that 5G won’t be a “wow” thing for consumers, and noted there is a lot of debate raging regarding how smart sensors should be (the Tier 1’s want smart).He was then joined on the stage by the participants in the first panel discussion, which looked at product and application drivers. That included: NXP Fellow Rob Cosaro; Tim Dry, Director of Edge Endpoints Marketing at Samsung Foundry; ST biz dev director Roger Forchhammer; CoreAVI biz dev VP Lee Melatti; Nokia VP Michael Reiha; and Analog Bits EVP Mahesh Tirupattur.First Short asked why customers wanted more integrated solutions. For CoreAvi, it’s about safety, for ST in automotive it’s about security, for Analog Bits, it’s about integrating more analog, for Nokia it’s just a necessity.Then he asked Why FD-SOI? What can you do that you couldn’t do before? For ST, which is doing MCUs for automotive, it’s about energy efficiency, speed, the density of non-volatile memory and the robustness of the technology. For NXP, it’s back biasing, low voltage and power numbers never seen before. “FD-SOI really makes a difference in the products we can bring to market,” said Cosaro. For CoreAVI, it’s the long-term power impact. And for Analog Bits, “Customers see huge benefits,” said Tirupattur, for cost sensitive applications. He has customers selling their technology in high volumes in FD-SOI. What about edge vs. cloud? For Nokia, it’s monolithic integration for best-in-class RF, advanced memory, biasing and voltage regulation adding a layer of intelligence. Samsung sees edge as distributed cloud, and CoreAVI sees safety in the edge, because you can’t completely rely on the cloud.Where are the weak points in the FD-SOI ecosystem? For Samsung, more people need to use back biasing. “People need to use the knobs,” said Dry. For Analog Bits, the next step is innovation around back biasing, as many in logic don’t understand the benefits, so the ecosystem needs to promote the value proposition. ST suggests that with more products out there, customers will see the benefits. NXP did “a lot of the heavy lifting” at 28nm – now you need more people using these nodes, not just the cellphone nodes.How will the architecture change? For NXP, it’s all about memory bandwidth. For Samsung, it’s the promise of analog and interconnect. Nokia sees the back-end and heterogeneous integration with FD-SOI and RF enablement. Analog Bits’ Tirupattur said he’s pushing his engineers for even lower power in a still smaller form factor, noting that most analog engineers had been more focused on performance than power, but now that’s changed. For ST, it’s AI/ML throughout automotive, and FD-SOI is beneficial there.Leti the Connected Car Leti's slide 27, SOI Symposium, Silicon Valley 2019Research giant Leti’s presentation was entitled Applications Around the Connected Car. 85% of Leti’s €315M budget comes from R D contracts with its 350 industrial partners. Truly a driving force in FD-SOI, Leti is involved in a dizzying array of projects. For the connected car, they cover (much of it on SOI): high precision smart sensing, embedded processing fusion, new computing paradigms and deep learning, ultra-low power computing nodes framework, ultra-low power connectivity for IoT, energy management and scavenging, and security. They do vision at the edge, 3D technology for smart imagers, and ways to dramatically reduce power. They’ve got a Qbits platform on FD-SOI for AI at the edge, a super low power neural network accelerator, and ULP connectivity. Check out the presentation for lots of details.EDA/IP OverviewSlide 9 from SOI EDA/IP Overview.SOI Consortium Executive Co-Director Jon Cheek gave a quick round-up presentation aggregating various IP and EDA offerings entitled , SOI EDA/IP Overview. It is taken from recent member presentations including Cadence, Silvaco, VeriSilicon, Synopsys and GlobalFoundries, giving you an idea of how dynamic the ecosystem has become.Automating Analog While the logic side of the design equation has long had robust automation tools, some consider the analog side as sort of black magic. New consortium member Intento Design aims to fix that. Here at ASN we covered their work with ST briefly a few months ago here. At the SOI Symposium, the company’s CEO Dr. Ramy ISKANDER presented their solution in ID-XploreTM: A Disruptive EDA for Emerging FDSOI Applications. Intento, a partner in GlobalFoundries FDXcelerator program, has cognitive software for first-time right analog design. It determines the appropriate static and dynamic body biasing ranges to meet PVTB (Process/Voltage/Temperature/Body Bias), and is fully integrated into the Cadence Environment. They produced multiple correct-by-construction FD-SOI designs, and the total time spent to generate eight candidates FD-SOI designs took less than a day. The Tools Are in the BoxThe last panel discussion, entitled Are the Tools in the Box? was moderated by the Consortium’s Jon Cheek. Participants included: VeriSilicon SVP David Jarmon; Arm PDG Marketing VP Kelvin Low; NXP’s Stefano Pietri, Technical Director of the company’s Microcontrollers Analog Design Team; Jamie Schaeffer, who’s GF’s Sr. Product Offering Manager for 22FDX and 12FDX; and Cadence Strategic Alliances Director Jonathan Smith. 2nd panel discussion, SOI Symposium, Silicon Valley 2019Yes, the tools are in the box. Smith of Cadence said they’re providing them, and NXP’s Pietro said that they’re very well positioned in his specialty, analog. VeriSilicon has IP, and anything they don’t have in house they’ll license. So why be afraid of body biasing? NXP has proof by example – they see such huge cost advantages that they try to leverage it as much as possible. GF’s doing training, since each area (automotive, IoT, etc.) has different needs. Some VeriSilicon customers already see such substantial benefits from FD-SOI that they’re not bothering to do biasing. Cadence points out that the Arm POP announcement is huge, and Arm’s Low wondered if the SOI Consortium could do an IP portal? “Our sales departments need to explain the advantages to our customers!” said NXP’s Pietro.From the audience, NXP VP longtime FD-SOI proponent Ron Martino (who, btw, wrote some great articles for ASN when they first got into FD-SOI – read them here), asked why designers think FD-SOI means a lot of corners? How do we convince the industry that FD-SOI simplifies design? Cadence is working with GF, responded Smith, and will have some big new at Arm’s TechCon this fall. “We need more training and marketing to show it’s not scary," he added. For GF, the corners don’t get more complicated, and they’re working with Dolphin Integration on getting them covered early in the planning. Ease of access to IP will help, per Arm. And in a great concluding remark, VeriSilicon’s Jarmon said, “The craft is being automated. The more we work together, the greater success of FD-SOI.”

Dan Hutcheson, VLSI Research, Interviews Carlos Mazure, Executive Director, SOI Industry Consortiumhttps://youtu.be/a5GyrAZTYIsSummary: SOI has come a long way over the last two years. Design flows and IP portfolios are more complete. Long a mainstay for RF, Silicon-On-Insulator has made its way into many new products on the market this year. Dan Hutcheson has a conversation about what’s happening today with Carlos Mazure, Executive Director, SOI Industry Consortium.

Join us! In partnership with our members, the SOI Consortium is co-organizing and participating in two key SOI events coming up in China over the next few weeks. On May 18th, we’ve put together an SOI Forum at the World Semiconductor Congress (WCS) in Nanjing. And on May 23rd 24th, we’ve teamed up with our members SIMIT, Sitri and Leti for another in our series of SOI Academies, including an FD-SOI Training Day. (The last one this past winter was a terrific success – read about that here if you missed our coverage at the time.) QR code for WCS, Nanjing '19At WCS, the SOI Forum (sub-forum #8) is part of the afternoon Innovation Summit. We’ll cover the broader SOI ecosystem, including both RF-SOI and FD-SOI – from wafers to design through manufacturing. Presentations will be given by members of the SOI Consortium team, and by leaders from our membership, including Simgui, NXP, Incize, ST, IBM, Cadence and Xpeedic. Click here or scan the QR code for the full program and registration information. Also at WCS, SOI Consortium member VeriSilicon will be participating in a morning session on AI and IoT Wireless Communications (sub-forum #4). They’ll be giving a presentation on their low-power Bluetooth design platform for GlobalFoundries 22FDX, and their CEO Wayne Dai will be moderating a round-table discussion. You can get more information on that (in Chinese only, tho) here, or follow VeriSilicon on WeChat. QR code for SOI Academy and FD-SOI Training, Shanghaid 2019The SOI Academy in Shanghai is an opportunity for experienced designers to gain solid expertise in FD-SOI. The event begins in the afternoon of May 23rd with a series of informative plenary talks by members of the SOI Consortium team, and by experts from our members Leti, Soitec, VeriSilicon, GlobalFoundries and NXP. The FD-SOI Training starts the next morning, on May 24th.. This is a hands-on event lead by top experts from Leti. The morning is devoted to digital design in FD-SOI, and the afternoon to RF design (including for 5G) in FD-SOI. Attendees will get a comprehensive understanding of design techniques for low-power chips leveraging the multiple benefits and flexibility of FD-SOI technology. Get more information here, or from the WeChat QR code.We've got a busy schedule! To keep up to date with where we and our members will be promoting the SOI ecosystem, be sure to check our Events page regularly.

Why Is Smart Parking a Hot Topic? Poorly managed parking resources have a substantial negative impact on cities — one that has been well-documented. According to industry studies, poorly managed parking: Increases Traffic Congestion: 30% of traffic is caused by ongoing circling for parking. Increases Pollution: In Westwood, California, cruising for parking burned 47,000 gallons of gas and generated 730 tons of carbon dioxide in one year. Frustrates Drivers: Urban drivers spend an average of 20 minutes per trip looking for parking. Stifles Economic Opportunities: Traffic congestion cost Americans $124 billion in 2013, and this is predicted to rise to $186 billion by 2030. These problems are getting worse. As a result of growing urban populations, cities account for more than 80% of carbon emissions globally. Unplanned or inadequately managed urban expansion leads to rapid sprawl, pollution and environmental degradation. Due to the lack of parking-space availability, for example, Japan is ranked among the most expensive countries for paid parking. If left unaddressed, poor parking management will continue to plague cities, both large and small. Fortunately, Smart City Internet of Things (IoT) initiatives are helping cities to address their parking issues. IoT to the RescueThere are three key drivers of Smart City IoT initiatives. Cities want to: Improve the overall quality of life and mobility in urban environments Leverage technology to augment and improve existing infrastructure and services that citizens rely on every day Foster both economic and environmental improvements The availability of high-accuracy vehicle detection sensors coupled with affordable, low-power connectivity has enabled a new generation of Smart Parking technology. However, choosing the right Smart Parking solution is essential.High-accuracy vehicle detection sensors can provide valuable data to city planners and parking managers. This information includes: Parking availability Traffic flow Parking occupancy rate and historical data Turnover For parking management to effect change, city traffic managers, parking managers and urban planners need a holistic view of parking availability and usage patterns, and users need real-time information about available parking spaces.Sensors, cameras and communication networks form the basic infrastructure for Smart Parking. To deliver on the promise of IoT and to help cities improve the overall quality of life for residents and visitors, cities need a complete smart parking solution that provides: Accurate real-time vehicle detection and location of available parking spaces – significantly reduces the amount of time spent cruising for parking spaces, giving drivers the precise location of available spaces Connectivity from the sensor to the cloud – facilitates real-time parking data that city planners, parking enforcement and traffic managers can use to reduce traffic congestion Parking applications for cities, parking-lot owners and drivers — enables navigation to available parking and supports mobile payment, streamlining the parking process. Parking applications can also direct traffic enforcement personnel to parking violations as they occur, helping to alleviate traffic bottlenecks, such as double parking in loading zones. Such applications also improve the efficiency of other city services such as public transportation and garbage collection. Complete Smart Parking Solution – Sensor to Cloud (Source: PNI Sensor) To learn how cities are using Smart Parking sensors to improve the services they offer to residents and visitors, come see PNI at SEMI’s 2019 FLEX Japan MEMS Sensors Forum (May 22-23, Toyko, Japan). PNI President and CEO Becky Oh and PNI’s partner, Macnica Networks, will share Smart Parking use cases from innovative cities, corporate campuses and universities (Smart Parking presentation, May 22 from 16:55-17:25). Register for the conference today. For more information about PNI Sensor, visit the PNI Sensor website. Becky Oh is the president and CEO of PNI Sensor. Throughout her 20 years with the company, Ms. Oh has held a range of senior-level positions, from operations to technical business development. She received an M.S. degree in Electrical Engineering from Cornell University and a B.S. in Electrical Engineering and Computer Science from MIT. Ms. Oh holds multiple patents in the area of devices with multi-sensing and reporting capabilities.

For the second consecutive year the SOI Consortium will have a stand at the Networking Reception during the Samsung Foundry Forum (SFF). This important Silicon Valley event will be held on May 14, 2019 at the Santa Clara Marriott. We hope you'll stop by to learn more about the SOI Consortium and the FD-SOI ecosystem. There’s been a steady stream of news about Samsung’s FD-SOI offerings and support, including their highly successful 28FDS and coming very soon: 18FDS. (If you need to catch up, click here to read more.) As in the previous 3 years, Samsung will be making major announcements on their technology roadmap and application solutions. SFF is a unique opportunity to network with Korean and US based executives from Samsung Foundry as well as customers and ecosystem partners. SOI Consortium members ARM, Synopsys, Cadence, Analog Bits, VeriSilicon and Xpeedic will also have stands, and NXP will be on the customer panel.Seats are limited, so go to http://www.samsungfoundryforum.com/2019/ to register now.

Key takeaway #2: If you need a Goldilocks process node – where you'll get just the right balance between active power, unit cost and investment – look to FD-SOI. And, btw, the IP landscape has improved dramatically. Those were just some of the great points made by Huibert Verhoeven (shown above), GM/SVP of Synaptics' IoT Division in his talk at the recent SOI Symposium in Silicon Valley.BTW, if you missed part 1 of our coverage --Silicon Valley SOI Symposium a Huge Success. Key Takeaways (Part 1) Here. – you’ll want to be sure to read it, too. Almost all of the presentations are now posted on our website – click here to access them.In this post here, we’ll cover presentations by Synaptics, GlobalFoundries, STMicroelectronics, Anokiwave and Dolphin Integration. It was a really full, day, so be sure to stay turned for Part 3 of our coverage to follow shortly: it will highlight the remaining presentations and panel discussions.Synaptics: Smart Home at the EdgeSynaptics’ Verhoeven’s presentation Revolutionizing User Experience Through Secure Neural Network Acceleration at the Edge was about Smart Home and using SOI. Synaptics is a human interface (HMI) company that’s been doing neural networks since 1986. They’ve always been on the leading edge, from their first shipment of PC touchpads to becoming a dominant force in all things HMI today: they now ship over a billion units annually. Synaptics slides 15 16 from the SOI Symposium, Silicon Valley 2019.They currently have SOI products shipping with dedicated neural networks for voice, he said. European [privacy] regulations have played a part in driving their use of SOI, as have challenges regarding power and heat. Things are getting smarter at the edge. For example, not only do users want their coffee machine to offer the usual morning espresso, Synaptics says that the next step is for your coffee machine to recognize you’re looking extra tired and ask if you might want a double?! For them Smart Home and multi-modal applications are the primary area of interest, as well as some automotive. Although their biggest customers have resources, others need guidance. Voice is a critical component, but now you also need video and display.Why SOI? Their HMI vision requires low power, significant computation and dedicated neural network hardware, explained Verhoeven, so FD-SOI with RF meets their needs. “22nm SOI is a Goldilocks IoT Process Node,” he proclaimed. It gets the combination of active power, unit cost and investment just right. What’s more, he said, “The IP landscape has improved dramatically. Our choice of SOI was not an accident.” Be on the lookout for more products leveraging FD-SOI over the next six months, he concluded. At this point on SOI, they’ve got 1 TOPS products with dedicated NPU for speakers, soundbars, Wi-Fi mesh, appliances, STBs and smart displays. These products have voice and sensor real-time (RT) AI. Next up is 4 TOPS on SOI with dedicated NPU, targeting STBs and smart displays with voice, video, imaging and RT AI. GF: World-Changing OppsGlobalFoundries slides 6 7 from the SOI Symposium 2019, Silicon Valley.“Our clients are at the forefront of changing the world,” declared Mark Granger, VP of the Automotive Product Line at GlobalFoundries. His presentation, Capturing High Growth Market Opportunities with SOI, detailed how mobility, automotive and IoT are the growth markets for SOI. So not unsurprisingly, GF’s 22nm FD-SOI technology, 22FDX, is seeing particular traction in mobile, edge, wearables and automotive. They’ve got twice as many tape-outs this year as they did a year ago, he noted. GF’s SOI portfolio includes 22FDX®, 45RFSOI and 8SW/7SW RF SOI for 5G/mobility; 22FDX for automotive (fully qualified for automotive Grade 2, with Grade 1 on the way); and 22FDX, 130RFSOI and 8SW/7SW RF SOI for IoT. GF has announced a stream of good news recently:with Dolphin Integration they’re delivering differentiated FD-SOI Adaptive Body Bias Solutions for 5G, IoT and automotive applications;they’ve crossed the billion-dollar design win threshold with 8SW RF SOI technology; they’ve collaborated with Synopsys to develop the industry’s first Automotive Grade 1 IP for their 22FDX process;and they worked with Rambus on the delivery of High-Speed SerDes on 22FDX® for communications and 5G applications.You might have heard about the Dolphin Integration news, as we covered it recently here at ASN (if not, be sure to read it here). Dolphin’s IP and methodology solutions address energy efficiency challenges. Automated transistor body biasing adjustment can achieve up to 7x energy efficiency with power supply as low as 0.4V on 22FDX designs. At the Silicon Valley event, Dolphin Integration CEO Philippe Berger provided additional information in his talk, FD-SOI IP Platform for Energy-Efficient IoT SoC. Dolphin Integration slides 5 6 from the SOI Symposium 2019, Silicon Valley.In another GF-related talk, Nitin Jain, the CTO of longtime GF RF-SOI customer Anokiwave presented Unleashing the mmWave Phase Array Using SOI for 5G Satcom. Anokiwave is a fabless semi IC company (you’ll find a good technical discussion of mmWave phase array written by their Chief Architect here). They do active antennas (aka phased array), something the military’s done for a long time, but now Anokiwave is bringing it to new markets and applications including radar, satcom and 5G. What they’ve been able to do is planarize the active antennas. They use GF’s 45RFSOI process technology for phased array systems because of the cost, performance, scalability and system enhancements it enables. 45RFSOI, he explained, is ideal for beam-forming FEMs (including the switches, LNAs and PAs). The move to 5G/mmWave is going to require a lot of antennas, so these Anokiwave ICs are headed to high volumes, concluded Jain.Stellar by STAs Roger Forchhammer, Director of Business Development at STMicroelectronics pointed out in his presentation, Automotive FD-SOI Microcontrollers with Embedded PCM, ST pioneered FD-SOI (and that was almost a decade ago, btw). Then in February 2019, they announced a world first: they’d begun sampling 28nm FD-SOI microcontrollers (MCUs) with embedded non-volatile memory (eNVM) based on embedded Phase-Change Memory (ePCM) to 10 alpha customers. These MCUs target powertrain systems, advanced and secure gateways, safety/ADAS applications, and vehicle electrification.STMicroelectronics slides 9 10 from the SOI Symposium 2019, Silicon Valley.(In case you want technical details, the breakthrough ePCM eNVM was first presented at IEDM in December 2018 – you can get the presentation that accompanied the paper, Truly Innovative 28nm FDSOI Technology for Automotive Microcontroller Applications embedding 16MB Phase Change Memory, from the ST website.)In his Silicon Valley presentation, Forchhammer said they’re now doing Stellar, a whole family of automotive products on FD-SOI. To do it, they’d taken an existing device and moved it to 28nm FD-SOI with ePCM, which they manufacture at their fab in Crolles, France. A major advantage for automotive he cites is that in software updates it’s bit-level programmable. “ST is fully behind FD-SOI,” he concluded, adding that we’re see more automotive as well as IoT products coming soon. Well folks, that’s all for this post. We’ll finish up our coverage of the SOI Consortium’s 2019 Silicon Valley Symposium in the next ASN post (there was so much to cover!). So please stay tuned.

Air pollution is one of the grand challenges facing the entire planet — from the wealthiest nations to the least developed. The World Health Organization reports that nine out of 10 people breathe air containing high levels of pollutants, and that polluted air takes over seven million lives annually through stroke, heart disease and respiratory ailments.As a result, the world is thirsty for reliable, high-performing chemical and environmental sensors that can provide previously unavailable real-time awareness of environmental conditions. On one level, this seems like a relatively simple step, given that smartphones are already equipped with miniaturized sensing technologies that can monitor our living environment and activities.While highly desirable, embedding air pollution sensors in common mobile and wearable devices has not been feasible previously because the necessary trade-offs between high performance and miniaturization have made it impossible.This situation drove a CEA-Leti team to develop a novel generation of fully integrated optical chemical sensors that leverage MEMS technologies. The team successfully merged multiple functionalities on the same chip, using integrated optics and photonics, fluidics, acoustics and electromechanical transduction. How did the team overcome significant technical obstacles to design a proof-of-concept device that senses multiple environmental pollutants — housed in a minimal hardware footprint?Advancing Chemical Sensor Capabilities with Silicon Featuring high selectivity, real-time performance, and fully reversible capabilities, optical chemical sensors are perfect candidates for industrial, environmental and biomedical applications. Consequently, in recent years, worldwide R D initiatives have invested substantial effort to improve them.R D programs have focused particularly on the mid-infrared (Mid-IR) wavelength range (2.5 - 12 µm) — also known as the molecule fingerprint region, which provides a unique combination of fundamental absorption order-of-magnitude bands and unambiguous identification of specific chemicals. A multitude of molecules generate strong and distinct absorption lines in the Mid-IR, providing a foundation for accurate spectroscopic detection. Traditionally, however, these sensors have required large and expensive lenses for infrared (IR) light, making them too big and costly for resource-constrained wearables and mobile devices.Fortunately, recent advances in integrated silicon photonics and quantum cascade laser (QCL) technologies have spurred investigation of new chemical sensor architectures. Richard Soref, a research professor at the University of Massachusetts Boston’s department of engineering, introduced the extension of Near-IR technology into the longer-wave Mid-IR infrared region in 2006. Soref’s concept showed that highly sensitive and selective gas sensors could be fabricated on planar substrates at low cost by co-integrating silicon MEMS, group IV photonics, and specifically designed III-V hetero-structures.While this approach showed promise, it preceded the widespread availability of most mobile devices and wearables. Foreseeing today’s proliferation of those devices, CEA-Leti developed the different building blocks required to implement these concepts in real devices.A New Concept of Integrated OpticsLeveraging these interesting findings, the institute developed a new combination of integrated optics and multiple sensor functions on a single chip: QCL sources, a photo-acoustic (PA) cell, and a mid-IR photonic integrated circuit (PIC) combiner. Their integration on a planar substrate (Figure 1) helped to achieve higher performance, new capabilities, and higher reliability at lower cost, all in a smaller package (less than a 1 cm3 or smaller than a 1-cent coin) with reduced weight and power consumption (less than 100 mJ per measurement). Figure 1: Fully integrated optical sensor (Courtesy: CEA Leti) This configuration represents a multi-gas-detection enabler. The PIC replaces costly, fragile discrete optics while the PA detector uses a MEMS microphone to replace bulky multi-pass cells.PA spectroscopy is among the most sensitive techniques available for monitoring chemical emissions or detecting gas traces. It relies on excitation of the chemical with a pulsed light source emitting at the absorption wavelengths of such molecules. The relaxation process creates local periodic variations of the temperature, resulting in stationary pressure waves, which high-performance microphones can detect.This new generation of devices, fully fabricated on silicon, shows performance comparable with state-of-the-art systems, with the huge bonus of small size and power efficiency that work well for mobile and wearable electronics. By supporting integration onto common technological platforms, such as on-chip photoacoustic sensors, researchers have successfully realized these miniaturized and cost-effective Mid-IR photonic devices in silicon. Mobile device and wearables manufacturers can now take advantage of manufacturable integrated devices for applications that are highly sensitive to size, performance and cost. Adding gas sensing to mobile devices and wearables is now very feasible.For more information on chemical sensing at CEA-Leti, please visit or contact: http://www.leti-cea.com/cea-tech/leti/englishCEA-Leti is an active member of SEMI-MEMS Sensors Industry Group. The technology research institute, along with Fraunhofer and imec, recently joined SEMI’s family as a Strategic Association Partner under a memorandum of understanding (MOU). Under this agreement, CEA-Leti will work with SEMI to advance technology roadmaps, industry standards and cutting-edge technologies including Internet of Things (IoT), artificial intelligence (AI) and machine learning that enable new capabilities across healthcare, automotive and other electronics manufacturing ecosystems. Sergio Nicoletti has more than 20 years of experience in micro and nanofabrication, including magnetic, superconducting and chemical sensing devices and technologies. Having joined CEA-Leti in 2006 as project manager for optical sensing devices used in chemical detection, Nicoletti is currently business development manager at the institute.Previous positions include research and project management at CNR-IMM (Bologna, Italy) and at Hitachi Global Storage Technologies. Nicoletti was also a visiting scientist at HGST (San Jose, Calif.), where he worked on magnetic recording-head devices.Nicoletti holds more than 20 patents and has more than 70 publications in peer-reviewed journals. In 2016, he was appointed coordinator of the European H2020 project MIRPHAB and is director of the project’s pilot line.Nicoletti received his Ph.D. in physics, with a focus on HTc superconducting devices, from Université Joseph Fourier (Grenoble, France). References“Photoacoustic cell on silicon for mid-infrared QCL-based spectroscopic analysis,” JG Coutard, A Glière, JM Fedeli, O Lartigue, J Skubich, G Aoust, A Teulle, T Strahl, S Nicoletti, M Carras, L Duraffourg. Proceedings Volume 10931, MOEMS and Miniaturized Systems XVIII; 109310V (2019) https://doi.org/10.1117/12.2506514“Miniaturization of mid-IR sensors on Si: challenges and perspectives,” S Nicoletti, JM Fédéli, M Fournier, P Labeye, P Barritault, A Marchant, A Glière, A Teulle, J Coutard, L Duraffourg - Silicon Proceedings Volume 10923, Silicon Photonics XIV; 109230H (2019) https://doi.org/10.1117/12.2506759

In 2016, the then-Secretary-General of the United Nations, Ban-Ki Moon, stated “Saving our planet, lifting people out of poverty, advancing economic growth. These are one and the same fight. We must connect the dots between climate change, water scarcity, energy shortages, global health, food security and women’s empowerment.” The SEMI Talent Forum, 2-3 May, 2019 in Bristol, UK will explore new opportunities and challenges of the digital era and the industry’s need for talent and the knowledge and skills in automation, computerization and digitization to drive tech innovation. Serena Brischetto of SEMI spoke with professor Michael Czerniak, Environmental Solutions Business Development Manager at Edwards, about how digitalization impacts all these key areas and will be instrumental in helping humanity shape the future. SEMI: The preservation of the global environment and the talent shortage are probably two of the most critical challenges confronting the semiconductor industry. What is the Edwards position on these issues? Czerniak: When I started in the industry, climate change was a new concept and scientific investigation was in its infancy. Now it is a well-understood phenomenon and its impacts will only be minimised by the implementation of better technologies, nearly all of which depend on digital technology and a talented workforce to drive new innovation. This is mission-critical not only to Edwards, but also to the digital industry, and indeed our common future.SEMI: Edwards celebrates 100 years of empowering innovative people. How do you help electronics shape the future and advance life standards? What is your secret recipe?Czerniak: Edwards plays a key role in enabling semiconductor manufacturers by making the electronic circuits, also commonly known as chips, on which the Digital Age is built. Our secret recipe is: nothing! We literally have no molecules at all, i.e. vacuum, which enables the intricate processes like plasma chemistry taking place. Those are the processes used to sequentially deposit and remove the thin films that constitute a modern semiconductor device. We also remove harmful and global-warming gas exhausts from these processes to minimise the environmental impact of this amazing industry.SEMI: What is stimulating about semiconductors and could you give us an example of how Edwards is helping remove harmful and global-warming gases?Czerniak: I work in environmental science both at Edwards and also here in Bristol in the School of Chemistry. My least-favorite gas is called CF4. Not only is it thousands of times more impactful as a global warming gas, but also it has an atmospheric lifetime of 50,000 years. Using abatement technology pioneered by Edwards, emissions of this gas into the atmosphere produced by this industry, have been reduced by up to 95%. That’s certainly something to make you feel good about after a day at work!SEMI: Edwards was honored with the SEMI Diversity and Inclusion award and also for the company's 100th anniversary at the Industry Strategy Symposium (ISS) Europe in Milan in early April. What is particularly exciting about Edwards?Czerniak: Edwards is and always has been a very inclusive place to work, not least because it is a global company, reflecting the scope and geographical reach of the semiconductor industry as a whole. This provides a great variety of career paths locally at one of our many global manufacturing sites, or on a global scale, as we need to be where our customers are.SEMI: What are your expectations regarding the forum in Bristol, and for the future ahead? What is the status of the semiconductor workforce development scenario in your opinion? What can we do more?Czerniak: My main hope for the Talent Forum in Bristol is that the profile of the semiconductor industry will be raised amongst students considering their future career options to the point where they seriously consider applying for positions in this field. This applies to students from all disciplines as they are all needed to help develop the Digital Age, and more events like this can only help spread the message about the exciting opportunities and challenges available.Michael Czerniak started his professional career in the semiconductor industry with Philips, initially in the company’s UK R+D labs and subsequently in the fab in Nijmegen, Holland. He then held marketing roles at UK-based OEMs Cambridge Instruments, VSW and VG Semicon before joining Edwards 21 years ago. Michael has authored numerous published articles and patents, co-chairs a SEMI standards committee, participates in the IRDS, is a UK PFC expert on IPCC and has authored chapters on Vacuum and Environmental issues in the Semiconductor Manufacturing Handbook. Michael became a Professor in the School of Chemistry at the University of Bristol in September 2018. Serena Brischetto is a marketing and communications manager at SEMI Europe.