Prudential Cleanroom Services is proud to announce our newest cleanroom laundry processing facility in Heath, OH (located in the greater Columbus / Central Ohio market area). The Ohio market is important to Prudential, so we can best serve our customers expansion requirements in the region. This will be Prudential’s eighth ISO Class 3 cleanroom laundry processing facility in the United States. This extends the greatest throughput capacity from any company in our industry. The new state of the art Cleanroom Laundry Processing Plant is approximately 67,000 square-feet and sits on over nine (9) acres. The NEW projected investment is projected to be $35 million. The site will employ up to eighty (80) full time employees or more. This Plant will be the industry’s most modern, newest and amongst the largest cleanroom processing Plants in the United States and possibly the world! Prudential is excited to bring this customer centric facility to Ohio that will provide direct services throughout the Midwest! https://www.prudentialuniforms.com/event/heath-ribbon-cutting-ceremony/
United States
- StandardsLiquid Chemicals North America TC Chapter
July Meeting
Date: Tuesday, July 29 - Wednesday, July 30
Time: 09:00-12:00 Noon Pacific Time
via Virtual Meeting
AGENDA
(subject to change)
Last updated: July 23, 2025
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Martinez, CA—EUV Tech (EUVT), a global leader in designing and manufacturing at-wavelength EUV metrology equipment, is excited to announce the release of the FALCON Photoresist Flood Exposure Tool. As our next-generation EUV resist characterization and diagnostics tool, FALCON allows photoresist manufacturers to rapidly and accurately test EUV resist sensitivity, as well as providing patterning materials developers critical insights into exposure mechanisms.
Built upon EUV Tech’s proven resist tool technology, FALCON is a fully automated tool that supports high-throughput contrast curves on EUV-patterning materials and radiation chemistry diagnostics by integrating a wide variety of optional add-on analysis and processing modules.
Enhancing FALCON’s platform is an array of in-situ analysis and process modules, including Fourier Transform Infrared (FTIR) Spectroscopy, Atomic Mass Spectrometry, Total Electron Yield (TEY), Photo-Electron Spectroscopy (PES), environmental and vacuum bake module with additional diagnostics, and a scanner-environment exposure module.
Key to FALCON’s effectiveness is its highly uniform exposure spot size of 6 mm, supporting high-sensitivity chemical analysis and over 1,000 exposures for a 300 mm wafer in a single recipe run. Built-in data visualization tools make it possible to analyze this rich data. Combining uniformity, high configurability, and deep data collection and analysis makes FALCON a highly efficient, cost-effective tool for advanced photoresist development.
For more information on the enhanced FALCON Flood Exposure Tool or any of EUV Tech’s at-wavelength metrology tools, please visit euvtech.com.
About EUV Tech
EUV Tech enables technology advancement in the frontiers of semiconductor manufacturing and material science through the development of world-leading EUV and soft-x-ray instrumentation and techniques.
For further information, contact:
EUV Tech, Inc.
[email protected]
+1 (925) 229-4388
Integration of EDA empowers OEMs to deliver structured, high-bandwidth data to semiconductor fabs and drive efficiencies for competitive advantage
CEA LID World Summit, Grenoble, France, June 17, 2025 – Agileo Automation, a leading provider of control and connectivity solutions for global semiconductor manufacturing equipment, today announced the future expansion of its A²ECF-SEMI automation framework to include SEMI’s EDA (Equipment Data Acquisition) standards suite. This integration that already includes Agil’GEM and Agil’GEM300 will empower OEMs to deliver structured, high-bandwidth data to manufacturing facilities and drive process improvements with artificial intelligence (AI) by leveraging large amounts of reliable, actionable data. EDA standards, built on the legacy of SECS/GEM and GEM300, are transforming equipment communication and enabling high-speed, data-driven manufacturing. As semiconductor fabs become more connected and automated, the ability of OEM equipment to integrate seamlessly and deliver high-quality, structured data has become a competitive differentiator.
Agileo Automation has carried out EDA Freeze 2 client and server tests with equipment manufacturers already supporting EDA and is working with these early adopters on the integration on their equipment using A²ECF-SEMI, Agil'GEM, and Agil'GEM300. The company will soon be providing a comprehensive offer for OEMs in need of EDA Freeze 2 or 3. EDA is increasingly required in RFQs that equipment manufacturers must address.
“EDA is going to enable fabs to realize superior yields, faster innovation cycles, and a sustainable competitive advantage in an ever-accelerating market,” explains Marc Engel, CEO of Agileo Automation. “Agileo is proud to be a major contributor to this global effort and pleased to support OEMs in all market segments with a complete and scalable product suite.”
About Agileo Automation
Since its inception in 2010 in Poitiers, France, Agileo Automation has empowered global semiconductor equipment manufacturers to optimize their production machines with control, communication, data acquisition, and testing solutions, enabling their deployment in large-scale fabs worldwide. At the heart of Industry 4.0, Agileo’s A²ECF-SEMI framework provides a robust foundation for developing equipment controller software, leveraging the SEMI SECS/GEM and GEM300 standard suites. As a member of SEMI and the OPC Foundation, Agileo Automation is a key contributor to the development and integration of industry standards such as SEMI standards and OPC Unified Architecture (OPC UA). For more information, please visit our web site or follow us on LinkedIn.
Nordson Electronics Solutions, a global leader in reliable electronics manufacturing technologies, has developed several solutions for panel-level packaging (PLP) during semiconductor manufacturing. In one particular case, Nordson’s customer, Powertech Technology, Inc. (PTI) saw underfill yields improve to greater than 99% as they plan to transition from wafers to panels in their manufacturing operations. For details about this solution developed in late 2024 and 2025, download the case study here: Customer Success: Powertech Technology Inc. (PTI) Advances Panel Level Packaging with Nordson.
PTI, one of the world’s top OSAT (Outsourced Semiconductor Assembly and Test) companies, worked with the Nordson applications team to set up a comprehensive PLP demonstration that achieved high-quality, void-free underfill results at scale, using the industry-leading ASYMTEK Vantage® Series fluid dispensing system, equipped with the ASYMTEK IntelliJet® Jetting system. Nordson’s precision technology mitigated warpage and optimized fluid flow while decreasing cycle time by almost 30%.
PLP offers a path to managing the complexity of larger die sizes and higher-density designs while maintaining manufacturability and cost efficiency as the semiconductor industry transitions from 300-mm wafers to panels. PTI is enabling PLP applications that are designed to meet the semiconductor industry’s growing demands to serve AI, high-performance computing (HPC), and chiplet-based architectures.
Underfill has been pivotal in semiconductor packaging since the adoption of flip-chips in the 1990s. As applications have become more demanding, particularly in high-performance CPUs, GPUs, and advanced architectures like flip-chip and 2.5D/3D ICs, the importance of underfilling to enhance mechanical reliability and thermal performance has grown. Since the beginning, Nordson developed innovations for underfill processes as the industry evolved from PC board, substrate, wafer, and now panel applications.
Nordson’s distributor, Jetinn Global Equipment Ltd., supported the advancements discussed in this case study by investing in demonstration equipment and providing expert technical support.
WATCH ON-DEMAND
Are We There Yet? Metrology and Inspection for Angstrom-Level Manufacturing
In the semiconductor industry where we routinely pattern sub-wavelength structures and require atomic-layer precision in our manufacturing processes, it’s easy to assume that we can simply measure everything we’re doing and all the structures we create. In reality, though, metrology and inspection have the challenging task of not just keeping up with device technology but staying far enough ahead that we can actually “see” our results and confirm the progress we’re making.
In this webinar, co-hosted with the Electronics business of Merck KGaA, Darmstadt, Germany; we will explore the metrology and inspection space to learn more about technological advances driving this vital segment of semiconductor manufacturing.
The webinar will feature presentations by Eric Beyne, PhD, Senior Fellow, VP R&D and Director of 3D System Integration Program for imec, and Dario Alliata, PhD, Senior Application Director for Metrology & Inspection at the Electronics business of Merck KGaA, Darmstadt, Germany.
Following the presentations, an interactive Q&A segment will allow attendees a chance to deepen their understanding of how materials innovation and advanced metrology intersect at the leading edge of manufacturing.
Join us to engage with peers and pioneers working at the forefront of materials science and semiconductor innovation!
United States
The Role & the Challenge of Metrology and Inspection in Advanced Packaging of AI Chips
The massive adoption of social networking and artificial intelligence has pushed the semiconductor industry to develop devices capable of supporting the required infrastructures. Increasingly powerful computer process units (CPU) are used to allow data centers to process trillions of information exchanges, while faster graphic process units (GPU) enable virtual and assisted reality.
Cost leveraging is now reachable with the integration of multiple dies in the same package, each one fabricated to handle specific functionalities with the most cost-effective technology node, which is a form of heterogeneous integration. This session highlights some examples of metrology and inspection solutions aimed at securing the manufacturability of devices for High Computing Power fundamental for AI applications. More in detail, it explores the challenge of the fabrication of chip-to-chip interconnections that are key for the heterogeneous integration of active components with vertical stacking like DRAM for High Bandwidth memories, where process tolerances are increasingly narrow and conditions to measure more and more extremes.
Biography
Dr. Dario Alliata joined Unity-SC, now part of the Electronics business of Merck KGaA, Darmstadt, Germany in the U.S. and Canada. In 2016 as product manager and is now Sr. Director of Applications with focus on Advanced packaging and Specialty substrates & devices.
He worked in the semiconductor industry for more than 25 years, initially in R&D centers and later in equipment makers. He spent his entire career developing process control solutions for securing the manufacturing chain in the semiconductor industry.
He received a MD in Physics from the University of Milan (Italy) and hold a Ph.D. in Physics & Chemistry from the University of Berne (Switzerland).
Sub-Micron Pitch Scaling of Hybrid Bond Interconnects: Metrology Challenges
Advanced 3D integration technology will increasingly rely on hybrid bonding technology for both wafer-to-wafer and die-to-wafer bonding. This allows for micrometer and sub-micrometer pitch interconnects, resulting in very high 3D interconnect densities, compatible with the back-end-of -line interconnect layers of active logic and memory die. The results are “seamlessly” interconnected die. Off-chip interconnects become equivalent (or better) than on-chip interconnects.
These great system-level benefits however come at some challenges. Small overlay errors or surface imperfections can prevent defects, resulting in yield loss. Critical process, steps, such as CMP, wafer dicing and surface cleaning steps, need to be monitored with higher accuracy to maintain a good process. New parameters, such as wafer shape, distortion, surface profile slopes, and copper pad recess levels need to be measured and continuously monitored. This poses significant challenges to metrology related to hybrid bonding. The presentation will highlight these needs and show some practical solutions.
Biography
Eric Beyne obtained a degree in electrical engineering in 1983 and the Ph.D. in Applied Sciences in 1990, both from the Katholieke Universiteit Leuven, Belgium. Since 1986 he has been with IMEC in Leuven, Belgium where he has worked on advanced packaging and interconnect technologies. Currently, he is imec senior fellow, VP R&D and program director of imec’s 3D System Integration program.
Moderator
Biography
I'm a seasoned Senior Application Manager at Brewer Science with over two decades of experience in Semiconductor industry. I lead application teams at Brewer Science Inc, focusing on advanced materials for the semiconductor industry. With a background in Material Science, I enjoy tackling technical challenges, from optimizing critical processes to finding creative ways to characterize materials.
Sponsored by the Electronics business of Merck KGaA, Darmstadt, Germany
Breakthrough in Semiconductor Lithography Recognized by the American Chemical Society
WILMINGTON, Del., June 10, 2025 – DuPont (NYSE: DD) today announced that 13 of its current and former scientists and engineers have been named 2025 Heroes of Chemistry by the American Chemical Society (ACS) for an innovative program that progressed semiconductor lithography.
The award recognizes the collaborative development of embedded barrier layer technology, a transformative advancement in 193 nm immersion lithography that significantly improved chip fabrication processes by increasing yield, reducing defects, and enhancing process efficiency. The honored team includes Deyan Wang, Ph.D., Cong Liu, Ph.D., Doris Kang, Ph.D., MingQi Li, Ph.D., Shintaro Yamada, Ph.D., Stefan Caporale, Chengbai Xu, Ph.D., George Barclay, Ph.D., ChunYi Wu, Joon Seok Oh, Li Jia, Jinrong Liu, and Anthony Zampini.
Formulations containing embedded barrier technology have been widely adopted in lithography processes across the global semiconductor industry, supporting advancements for technologies such as artificial intelligence (AI), advanced computing and consumer electronics.
Embedded barrier layer technology addresses key challenges in early immersion lithography such as defectivity and process stability. By integrating barrier functionality directly into the photoresist, fabricators can simplify their lithography processes, with lower materials usage and reduced energy consumption. This advanced technology contributes to improvements in operational efficiency and sustainability for high-volume chip fabrication.
“The introduction of embedded barrier layer technology marked a critical breakthrough innovation for the global semiconductor industry, by extending the capabilities of what is possible with 193 immersion lithography to support the production of advanced, energy-efficient chips,” said Randal King, Vice President of R&D/Technology, Qnity™, DuPont Electronics. “Embedded barrier layer solutions were first implemented over a decade ago and continue to be widely used today. The success of this team demonstrates how materials innovation is powering amazing leaps in technology.”
The ACS Heroes of Chemistry Award is presented annually to industrial scientists whose work has led to the successful development and commercialization of impactful chemistry-based products. The 2025 awardees will be formally recognized at a ceremony in August, as part of the ACS Fall 2025 meeting in Washington, D.C.
About DuPont
DuPont (NYSE: DD) is a global innovation leader with technology-based materials and solutions that help transform industries and everyday life. Our employees apply diverse science and expertise to help customers advance their best ideas and deliver essential innovations in key markets including electronics, transportation, construction, water, healthcare and worker safety. More information about the company, its businesses and solutions can be found at www.dupont.com. Investors can access information included on the Investor Relations section of the website at investors.dupont.com.
As world leaders act to secure access to these minerals, companies come under pressure to follow due diligence guidelines to promote ethical sourcing of these materials for their supply chains. Regulations such as the US Dodd-Frank Wall Street Reform and Consumer Protection Act (Section 1502), EU Regulation 2017/821 and the EU Corporate Sustainability Due Diligence Directive require companies to trace materials through their supply chains and report to the public about their use of conflict minerals.
Several industry associations, including the Responsible Business Alliance’s Responsible Minerals Initiative, were created to help companies with their due diligence efforts. Reports such as those issued by the US Government Accountability Office on Conflict Minerals offer insights into the efficacy of these regulations and suggest improved approaches for industry engagement.
The SEMI Responsible Supply Chain (RSC) working group was recently formed to host discussions on these topics. This webinar will provide insights from speakers Jennifer Peyser, Responsible Business Alliance Senior Vice President of Responsible Sourcing, and Kimberly Gianopoulos, Managing Director for the International Affairs and Trade team at the U.S. Government Accountability Office (GAO).
United States
Welcome and Introductions of RSC working group
Dr. Harrison is a MEMS Engineer with AMFitzgerald & Associates, a design firm located in the Bay Area California. She has a doctoral degree in mechanical engineering from Stanford University, and has worked as a designer and process engineer in the semiconductor industry for 10 years. She was nominated as a 2022 MEMS & Sensors Industry Group Emerging Leader. As a founding member and leader of the SEMI Responsible Supply Chain Working Group, she hopes to bring SEMI members together to discuss solutions to human rights issues in the semiconductor supply chain.
Conflict Minerals Supply Chain Overview
Report Review
Director Gianopoulos oversees a 140-person team that reviews a wide variety of federal government oversight issues, including International Security Assistance, Bilateral and Multilateral Foreign Assistance, International Trade and Finance, and U.S. Diplomatic Presence and Management. She serves as a facilitator in GAO’s Learning Center and participates in recruiting activities. Ms. Gianopoulos has received several awards, including a Distinguished Service Award, a Meritorious Service Award, a Client Service Award, and several Results Through Teamwork awards. Ms. Gianopoulos earned a Bachelor’s degree in Mathematics and a Master’s degree in Public Analysis and Administration from the State University of New York at Binghamton. She is a Certified Government Financial Manager and a member of Pi Alpha Alpha, the Global Honor Society for Public Affairs and Administration.
RMI Activity Overview
“The RMI supports over 500 downstream, midstream, and upstream member companies with a suite of due diligence standards and tools, data, guidance, training, and other resources for global responsible sourcing and regulatory compliance. Our facility and supply chain due diligence standards are rooted in longstanding international norms while reflecting emerging corporate and stakeholder priorities for regulatory compliance, managing sustainability risks and impacts, and fostering responsible mineral supply chains.”
Q&A
Summary and Closing Remarks
Course Description
This course offers a solid foundation in semiconductor manufacturing, from basic concepts to advanced techniques, providing practical insights into the tools, processes, and technologies driving the industry.
Learning Objectives
- Gain a comprehensive understanding of the semiconductor industry and manufacturing process, design, and eco-system of the semiconductor industry
- Understand the jargon, tools, and materials used in the design and fabrication of an integrated chip
- Effectively be able to communicate semiconductor manufacturing concepts with other associates and industry professionals
Course Topics
- Basic Electronics and Microelectronics: Definitions of essential electronic terms/concepts and introduction to microelectronics and integrated circuits
- Process Nodes: Process nodes and their impact on device performance and cost
- Device Physics and Transistor Operation: Principles of device operation and transistor functionality
- Crystal Growth and Wafer Preparation: Crystal growth techniques and wafer preparation processes
- Advanced Transistor Technologies: FDSOI, FinFETs, and Gate-All-Around (GAA) transistors and their impact on device performance
- Circuit Design and Layout: Introduction to circuit design, layout techniques, and tools
- Wafer Processing:
- Mask Making and Lithography: Techniques and materials used in mask making and various lithographic methods (DUV, Immersion, EUV)
- Clean Room Environments: Importance of clean rooms in semiconductor manufacturing and contamination issues
- Etching and Cleaning Processes: Plasma and wet etching processes
- Ion Implantation and Diffusion Techniques: Methods for doping and controlling diffusion in semiconductor fabrication
- Deposition Techniques: RTP, CVD, ALD, and ALE techniques and their effect on device performance
- Electroplating and Sputtering: Metal deposition techniques used in manufacturing
- Packaging and Testing: Techniques such as wire bonding, die stacking, flip chip, and chiplets packaging, semiconductor testing processes
- Metrology and Measurement Tools: Tools and methods used for precision measurement in semiconductor manufacturing
- Semiconductor Industry Ecosystem: The major players in the industry
Who Should Attend
Anyone interested in understanding semiconductor manufacturing, including new employees, professionals in related industries, and those seeking to broaden their knowledge of the field.
Instructor
Denny Frye
PT International, LLC
Testimonials
See what course participants had to say about this course!
- "The expansive width of coverage with sufficient depth; well curated, relevant information with live references, and the open style of delivery which made the course more of a sharing than a lecture, was enjoyable."
- "Denny's knowledge and ability to explain things in simplified ways was awesome!"
- "I really enjoyed going over the topics and watching the in-depth videos. I also liked how we received the slide information prior to the class."
- "The range of topics was perfect for an intro course."
- "Denny did a great job explaining complex topics. The opportunity to ask questions directly was beneficial for the entire class. If a question couldn't be answered immediately, it was addressed by the next break at the latest."
- "Thank you very much for the informative course. I appreciate the in-depth and in-detail insight in all aspects of Semiconductor Manufacturing!"
Important Information
Note that only the person who registered will receive a certificate of completion. This virtual training will not be recorded. Attendees must be present to access course knowledge.
Can't find the training link day of? After you register, you will receive the link to the live training via the email address you provided. In addition, you will receive email reminders about 24 hours in an advance and an hour before with the same link. Please keep these emails on hand to access the trainings on time. If you do not see any confirmation emails, please check your junk/spam folders before contacting SEMI U for support.
United States
- SEMI UGain a comprehensive understanding of the semiconductor industry and the integrated circuit (IC) manufacturing process. This course is designed for new personnel in the field or anyone seeking a well-rounded knowledge of the tools, materials, and terminology used in semiconductor manufacturing.
Pricing
- Members: $995
- Non-Members: $1,195
* For group orders with 10+ attendees, and for Students/Veterans discounted pricing, please contact [email protected].
Course Description
The first part of the course provides a brief overview of semiconductor design and fabrication steps, encompassing IC design techniques, all wafer processing steps, assembly, and packaging. It delves into semiconductor jargon in laypeople terms, and various substrate types such as Si, SiGe, FDSOI, GaAs, SiC, GaN. Additionally, it discusses different types of transistors like pMOS, nMOS, Bipolar, BiCMOS, CMOS, FinFets, and GAA and their evolution and what applications they are used in.
The second part of the course focuses on semiconductor business aspects such as silicon economics, wafer processing costs, semiconductor revenue forecasts, driving forces in the industry, top semiconductor IDMs, market competitors based on market share, OEMs, foundries, top tool vendors, and Fabless companies. Addresses the fastest-growing semiconductor markets based on geographic locations and applications, identifies semiconductor competitors/customers, and discusses major semiconductor markets like Automotive, PC, Mobile, Memory, Wireless, Cell phones, Consumer, Gaming, AI, IoT, Digital TV, Radio, Automotive, MEMS, and Emerging Technology & Impact on Industry.
Learning Objectives
- Understand the fundamental principles and theories semiconductor technology.
- Communicate with other associates and understand wafer processing steps.
- Understand semiconductor business aspects such as silicon economics, wafer processing costs, semiconductor revenue forecasts, driving forces in the industry, top semiconductor IDMs, market competitors based on market share, OEMs, foundries, top tool vendors, and Fabless companies.
- Review the semiconductor eco-system as it relates to design and fabrication of a semiconductor device.
- Gain knowledge of major semiconductor markets like Automotive, PC, Mobile, Memory, Wireless, Cell phones, Consumer, Gaming, AI, IoT, Automotive, MEMS, and Emerging Technology & Impact on Industry.
- Demonstrate effective communication skills through written reports, presentations, and discussions related to semiconductor subjects.
- Collaborate effectively with peers in group projects or discussions regarding semiconductor subjects.
- Analyze and evaluate research literature in semiconductor technology.
- Develop critical thinking and problem-solving skills applicable to semiconductor technology.
Who Should Attend
This course is suitable for anyone seeking a better understanding of the semiconductor industry, market leaders, terminology, business, and the semiconductor ecosystem.
Instructor
Denny Frye
PT International, LLC
Testimonials
See what course participants had to say about this course!
- "Denny Frye knows so much about the history of the semiconductor industry that he was able to tie together many different industries and technologies that I have heard about but never knew how they were connected."
- "Great overview of the semiconductor industry & market."
- "This was a very detailed course on many facets of the industry, would recommend!"
- "It was a great mix of technical and overview of the key players in the market!"
- "Good blend on technical and commercial topics."
- "Excellent introduction to the semiconductor world."
- "Great session on the understanding of the semiconductor industry in a nutshell."
Important Information
Note that only the person who registered will receive a certificate of completion. This virtual training will not be recorded. Attendees must be present to access course knowledge.
Can't find the training link day of? After you register, you will receive the link to the live training via the email address you provided. In addition, you will receive email reminders about 24 hours in an advance and an hour before with the same link. Please keep these emails on hand to access the trainings on time. If you do not see any confirmation emails, please check your junk/spam folders before contacting SEMI U for support.
United States
SEMI UEmbark on a journey through semiconductor design, manufacturing, and business in this illuminating course. Explore IC design techniques, transistor evolution, and market dynamics. Delve into substrate types and industry economics, discovering the fastest-growing markets and key players shaping the semiconductor landscape.
Pricing
- Members: $845
- Non-Members: $945
* For group orders with 10+ attendees, and for Students/Veterans discounted pricing, please contact [email protected].
